CS494002 datasheet(37/100 Pages) CIRRUS

37 / 100 page

4. POWER

The CS49400 requires a 2.5V digital power supply

for the core logic and 2.5V I/O and a 2.5V analog

power supply for the internal PLL. For systems

with external memory that runs on 3.3V, a 3.3V

digital power supply is required on the VDDSD

pins along with four digital grounds on VSSSD.

There are seven digital power pins, VDD1 through

VDD7, along with seven digital grounds, VSS1

through VSS7. There is one analog power pin,

PLLVDD, and one analog ground, PLLVSS. The

recommendations given below for decoupling and

power conditioning of the CS49400 will help to

ensure reliable performance.

4.1 Decoupling

It is necessary to decouple the power supply by

placing capacitors directly between the power and

ground of the CS49400. Each pair of power/ground

pins (VDD1/VSS1, etc.) should have its own

decoupling

capacitors.

The

recommended

procedure is to place both a 0.1uF and a 1uF

capacitor as close as physically possible to each

power pin. The 0.1uF capacitor should be closest to

the part (typically 5mm or closer).

4.2 Analog Power Conditioning

In order to obtain the best performance from the

CS49400’s internal PLL, the analog power supply

PLLVDD must be as noise-free as possible. A

ferrite bead and two capacitors should be used to

filter the VDD to generate PLLVDD. This power

scheme is shown in the typical connection

diagrams.

4.3 Ground

For two layer circuit boards, care should be taken

to have sufficient ground between the DSP and

parts in which it will be interfacing (DACs, ADCs,

S/PDIF Receivers, microcontrollers, and especially

external memory). Insufficient ground can degrade

noise margins between devices resulting in data

integrity problems.

4.4 Pads

The CS49400 has two different I/O voltage levels.

All signal pins not associated with the External

SRAM/SDRAM memory interface operate from

the 2.5V supply and are 3.3V tolerant. The external

SRAM/SDRAM memory interface operates at

3.3V only. However, if the external memory

interface is not used VDDSD1-4 may be connected

to 2.5V.

CS494002 数据表(PDF) 37 Page - Cirrus Logic

CS494002 数据表(HTML) 37 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

数据表下载