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CS494002 数据表(PDF) 92 Page - Cirrus Logic |
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CS494002 数据表(HTML) 92 Page - Cirrus Logic |
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92 / 100 page ![]() 92 CMOS level output that outputs a biphase-mark encoded (S/PDIF) IEC60958 signal or digital audio data which is capable of carrying two channels of PCM digital audio. OUTPUT AUDATA4, GPIO28 — Digital Audio Output 4, General Purpose I/O PCM digital-audio data output. This pin can act as a general-purpose input or output that can be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: OUTPUT AUDATA5, GPIO29 — Digital Audio Output 5, General Purpose I/O PCM digital-audio data output. This pin can act as a general-purpose input or output that can be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: OUTPUT AUDATA6, GPIO30 — Digital Audio Output 6, General Purpose I/O PCM digital-audio data output. This pin can act as a general-purpose input or output that can be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: OUTPUT AUDATA7, XMT958B, GPIO31 — Digital Audio Output 7, S/PDIF Transmitter, General Purpose I/O CMOS level output that contains a biphase-mark encoded (S/PDIF) IEC60958 signal or digital audio data which is capable of carrying two channels of PCM digital audio. This pin can also act as a general-purpose input or output that can be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: OUTPUT DBCK — Debug Clock Must be tied high to 3.3k ohm resistor. INPUT DBDA — Debug Data Must be tied high to 3.3k ohm resistor. BIDIRECTIONAL - Default: INPUT SLCKN, GPIO22 — PCM Audio Input Bit Clock, General Purpose I/O Digital-audio bit clock that is an input. SCLKN operates asynchronously from all other DSPAB clocks. The active edge of SCLKN can be programmed by the DSP. This pin can act as a general-purpose input or output that can be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: INPUT LRCLKN, GPIO23 — PCM Audio Input Sample Rate Clock, General Purpose I/O Digital-audio frame clock input. LRCLKN operates asynchronously from all other DSPAB clocks. The polarity of LRCLKN for a particular subframe can be programmed by the DSP. This pin can act as a general-purpose input or output that can be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: INPUT SDATAN0, GPIO24 — PCM Audio Input Data, General Purpose I/O Digital-audio PCM data input. This pin can act as a general-purpose input or output that can be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: INPUT SDATAN1, GPIO25 — PCM Audio Input Data, General Purpose I/O |
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