数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

CS494002 数据表(PDF) 78 Page - Cirrus Logic

部件名 CS494002
功能描述  Multi-Standard Audio Decoder Family
PDF  100 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS494002 数据表(HTML) 78 Page - Cirrus Logic

Back Button CS494002 Datasheet HTML 74Page - Cirrus Logic CS494002 Datasheet HTML 75Page - Cirrus Logic CS494002 Datasheet HTML 76Page - Cirrus Logic CS494002 Datasheet HTML 77Page - Cirrus Logic CS494002 Datasheet HTML 78Page - Cirrus Logic CS494002 Datasheet HTML 79Page - Cirrus Logic CS494002 Datasheet HTML 80Page - Cirrus Logic CS494002 Datasheet HTML 81Page - Cirrus Logic CS494002 Datasheet HTML 82Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 78 / 100 page
background image
78
10. HARDWARE CONFIGURATION
After download or soft reset, and before kickstart,
the host has the option of changing the default
hardware configuration. (Please see the Audio
Manager in the Application Messaging Section of
any Application Code User’s Guide for more
information on kickstarting.)
Hardware configuration messages are used to
physically reconfigure the hardware of the audio
decoder, as in enabling or disabling address
checking for the serial communication port.
Hardware configuration messages are also used to
initialize the data type (i.e., PCM or compressed)
and format (e.g., I2S, left justified, etc.) for digital
data inputs, as well as the data format and clocking
options for the digital output port.
In general, the hardware configuration can only be
changed immediately after download or after soft
reset
and
before
kickstart.
However,
some
applications provide the capability to change the
input ports without affecting other hardware
configurations, after sending a special Application
Restart message. (Please see the Audio Manager in
any Application Code User’s Guide to determine
whether the Application Restart message is
supported.)
11. DIGITAL INPUT AND OUTPUT
DATA FORMATS
The CS49400 supports a wide variety of data input
and output data formats through various input and
output ports. Hardware availability is entirely
dependent on whether the software application
code being used supports the required mode. This
data sheet presents most of the modes available
with the CS49400 hardware. This does not mean
that all of the modes are available with any
particular
piece
of
application
code.
The
Application Code User’s Guide for the particular
code being used should be referenced to determine
if a particular mode is supported. In addition if a
particular mode is desired that is not presented,
please contact your local FAE as to its availability.
11.1 Digital Audio Formats
This subsection will describe some common audio
formats that the CS49400 supports. It should be
noted that the input ports use up to 24-bit PCM
resolution and 16-bit compressed data word
lengths. The output port of the CS49400 provides
up to 24-bit PCM resolution.
11.1.1 I2S
Figure 55, "I2S Format" on page 79 shows the I2S
format. For I2S, data is presented most significant
bit first, one FSCLKN1 delay after the transition of
FLRCLKN1, and is valid on the rising edge of
FSCLKN1. For the I2S format, the left subframe is
presented when FLRCLKN1 is low; the right
subframe is presented when FLRCLKN1 is high.
FSCLKN1 is required to run at a frequency of 48Fs
or greater on the input ports.
11.1.2 Left Justified
Figure 56, "Left Justified Format (Rising Edge
Valid SCLK)" on page 79 shows the left justified
format with a rising edge FSCCLK. Data is
presented most significant bit first on the first
FSCLKN1 after an FLRCLKN1 transition and is
valid on the rising edge of FSCLKN1. For the left
justified format, the left subframe is presented
when FLRCLKN1 is high and the right subframe is
presented when FLRCLKN1 is low. The left
justified format can also be programmed for data to
be valid on the falling edge of FSCLKN1.
FSCLKN1 is required to run at a frequency of 48Fs
or greater on the input ports.
11.2 Digital Audio Input Port
The digital audio input port (DAI) on DSPAB, is
used for both compressed and PCM digital audio
data input. In addition this port supports a special
clocking mode in which a clock can be input to
directly drive the internal 33 bit counter. Table 18,
“Digital Audio Input Port,” on page 79 shows the



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com