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Z8018233FSC 数据表(PDF) 82 Page - Zilog, Inc. |
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Z8018233FSC 数据表(HTML) 82 Page - Zilog, Inc. |
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82 / 109 page ![]() 3-82 Z80182/Z8L182 ZILOG INTELLIGENT PERIPHERAL PRELIMINARY Zilog DS971820600 DC CHARACTERISTICS Z80182/Z8L182 (V CC = 3.3V ± 10%, VSS = 0V, over specified temperature range unless otherwise notes.) Symbol Parameter Min Typ Max Unit Condition V IH1 Input H Voltage V CC –0.6 V CC +0.3 V /RESET, EXTAL, NMI V IH2 Input H Voltage 2.0 V CC +0.3 V Except /RESET, EXTAL, NMI V IL1 Input L Voltage –0.3 0.6 V /RESET, EXTAL, NMI V IL2 Input L Voltage –0.3 0.8 V Except /RESET, EXTAL, NMI V OH1 Output H Voltage 2.15 V I OH = –200 µA All outputs V OH2 Output H PHI V CC –0.6 V I OH= –200 µA V OL1 Output L Voltage 0.40 V I OL = 2.2 mA All outputs V OL2 Output L PHI 0.40 V I OL= 2.2 mA I IL Input Leakage 10 µAV IN = 0.5 - VCC –0.5 Current All Inputs Except XTAL, EXTAL I TL Tri-state Leakage Current 10 µAV IN = 0.5 - VCC –0.5 I CC* Power Dissipation* 40 80 mA f = 20 MHz (Normal Operation) Power Dissipation* TBD TBD mA f= 20 MHz (SLEEP) Power Dissipation* TBD TBD mA f= 20 MHz (I/O STOP) Power Dissipation* 4 8 mA f = 20 MHz (SYSTEM STOP mode) IDLE Mode TBD TBD mA f = 20 MHz STANDBY Mode 50 µA f = 0 MHz † Cp Pin Capacitance 12 pF V IN = 0V, f = 1 MHz T A = 25°C Notes: These I CC values are preliminary and subject to change without notice. * V IH Min = V CC -1.0V, V IL Max = 0.8V (all output terminals are at no load) V CC = 3.3V † Device may take up to two seconds before stabilizing to steady state current. |
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