Z8018233FSC datasheet(21/109 Pages) ZILOG

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Z80182/Z8L182

ZILOG INTELLIGENT PERIPHERAL

PRELIMINARY

Zilog

DS971820600

The Z80182/Z8L182 has a 16550 MIMIC interface that

allows it to mimic the 16550 device. It has all the interface

pins necessary to connect to the PC/XT/AT bus. It contains

the complete register set of the part with the same interrupt

structure. The data path allows parallel transfer of data to

and from the register set by the internal Z80180 of the

Z80182/Z8L182. There is no shift register associated with

the mimic of the 16550 UART. This interface saves the

application from doing a serial transfer before performing

data compression or error correction on the data.

Control of the register set is maintained by six priority

encoded interrupts to the Z80182/Z8L182. When the PC/

XT/AT writes to THR, MCR, LCR, DLL, DLM, FCR or reads

the RBR, an interrupt to the Z80182/Z8L182 is generated.

Each interrupt can be individually masked off or all interrupts

can be disabled by writing a single bit. Both mode 0 and

mode 2 interrupts are supported by the 16550 MIMIC

interface.

16550 MIMIC INTERFACE FUNCTIONAL DESCRIPTION

Two eight-bit timers are also available to control the data

transfer rate of the 16550 MIMIC interface. Their input is

tied to the ESCC channel B divide clock, so a down count

of 24 bits is possible. An additional two eight bit timers are

available for programming the FIFO timeout feature (Four

Character Time Emulation) for both Receive and Transmit

FIFO’s.

The 16550 MIMIC interface supports the PC/XT/AT interrupt

structure as well as an additional mode that allows for a

wired Logic AND interrupt structure.

The 16550 MIMIC interface is also capable of high speed

parallel DMA transfers by using two control lines and the

transmit and receive registers of the 16550 MIMIC interface.

All registers of the 16550 MIMIC interface are accessible

in any page of I/O space since only the lowest eight

address lines are decoded. See Figure 6 for a block

diagram of the 16550 MIMIC interface.

16550 MIMIC

16550 MIMIC Side

or PC Side Interface

Addr/Decode

Databus

Receive

Timer

Transmit

Timer

Z80180

IRQ

Control

MPU Side

Interface

Control/

Config

Databus

Z80180

Address

PC IRQ

DMA

Control

Z80180

Databus

PC DMA CNTL

Z80180

DMA

Control

PC IRQ

Figure 6. 16550 MIMIC Block Diagram

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