Z8018233FSC datasheet(7/109 Pages) ZILOG

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Z80182/Z8L182

ZILOG INTELLIGENT PERIPHERAL

PRELIMINARY

Zilog

DS971820600

Z180 MPU DMA SIGNALS

/TEND0.

Transfer End 0 (output, active Low). This output

is asserted active during the last write cycle of a DMA

operation. It is used to indicate the end of the block

transfer. /TEND0 is multiplexed with CKA1 on the

CKA1//TEND0 pin.

/TEND1.

Transfer End 1 (output, active Low). This output

is asserted active during the last write cycle of a DMA

operation. It is used to indicate the end of the block

transfer. /TEND1 is multiplexed with the ESCC signal

/RTSB and the 16550 MIMIC interface signal /HRxRDY on

the /TEND1//RTSB//HRxRDY pin.

/DREQ0.

DMA request 0 (input, active Low). /DREQ0 is

used to request a DMA transfer from DMA channel 0. The

DMA channel monitors the input to determine when an

external device is ready for a read or write operation. This

input can be programmed to be either level or edge

sensed. /DREQ0 is multiplexed with CKA0 on the

CKA0//DREQ0 pin.

/DREQ1.

DMA request 1 (input, active Low). /DREQ1 is

used to request a DMA transfer from DMA channel 1. The

DMA channel monitors the input to determine when an

external device is ready for a read or write operation. This

input can be programmed to be either level or edge

sensed.

Z85230 ESCC™ SIGNALS

TxDA.

Transmit Data (output, active High). This output

signal transmits channel A’s serial data at standard TTL

levels. This output can be tri-stated during power down

modes.

TxDB.

Transmit Data (output, active High). This output

signal transmits channel B’s serial data at standard TTL

levels. In Z80182/Z8L182 mode 1, TxDB is multiplexed

with the 16550 MIMIC interface /HDDIS signal on the

TxDB//HDDIS pin.

RxDA.

Receive Data (inputs, active High). These inputs

receive channel A’s serial data at standard TTL levels.

RxDB.

Receive Data (input, active High). These inputs

receive channel B’s serial data at standard TTL levels. In

Z80182/Z8L182 mode 1 RxDB is multiplexed with the

16550 MIMIC HA1 input on the RxDB/HA1 pin.

/TRxCA.

Transmit/Receive Clock (input or output, active

Low). The functions of this pin are under channel A program

control. /TRxCA may supply the receive clock or the

transmit clock in the Input mode or supply the output of the

digital phase-locked loop, the crystal oscillator, the baud

rate generator, or the transmit clock in the output mode.

/TRxCB.

Transmit/Receive Clock (input or output, active

Low). The functions of this pin are under channel B program

control. /TRxCB may supply the receive clock or the

transmit clock in the input mode or supply the output of the

Digital Phase-Locked Loop (DPLL), the crystal oscillator,

the baud rate generator, or the transmit clock in output

mode. In Z80182/Z8L182 mode 1 /TRxCB is multiplexed

with the 16550 MIMIC interface HA0 input on the

/TRxCB/HA0 pin.

/RTxCA.

Receive/Transmit Clock (input, active Low). The

functions of this pin are under channel A program control.

In channel A, /RTxCA may supply the receive clock, the

transmit clock, the clock for the baud rate generator, or the

clock for the DPLL. This pin can also be programmed for

use by the /SYNCA pin as a crystal oscillator. The receive

clock may be 1, 16, 32, or 64 times the data rate in

asynchronous mode.

/RTxCB.

Receive/Transmit Clock (input, active Low). The

functions of this pin are under channel B program control.

In channel B, /RTxCB may supply the receive clock, the

transmit clock, the clock for the baud rate generator, or the

clock for the DPLL. This pin can also be programmed for

use by the /SYNCB pin as a crystal oscillator. The receive

clock may be 1, 16, 32, or 64 times the data rate in

asynchronous mode. In Z80182/Z8L182 mode 1 the

/RTxCB signal is multiplexed with 16550 MIMIC interface

HA2 input on the /RTxCB/HA2 pin.

Z180™ MPU TIMER SIGNALS

OUT. Timer Out (output, active High). TOUT is the pulse

output from PRT channel 1. This line is multiplexed with

A18 of the address bus on the A18/T

OUT pin.

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