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USB3320 数据表(PDF) 30 Page - Microchip Technology |
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USB3320 数据表(HTML) 30 Page - Microchip Technology |
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30 / 70 page ![]() USB3320 DS00001792B-page 30 2014-2015 Microchip Technology Inc. 5.6.2.6 VBUS Overvoltage Protection The USB3320 provides an integrated overvoltage protection circuit to protect the VBUS pin from excessive voltages that may be present at the USB connector. The overvoltage protection circuit works with an external resistor (RVBUS) by drawing current across the resistor to reduce the voltage at the VBUS pin. When voltage at the VBUS pin exceeds 5.5V, the Overvoltage Protection block will sink current to ground until VBUS is below 5.5V. The current drops the excess voltage across RVBUS and protects the USB3320 VBUS pin. The required RVBUS value is dependent on the operating mode of the USB3320 as shown in Table 5-7. The Overvoltage Protection circuit is designed to protect the USB3320 from continuous voltages up to 30V on the RVBUS resistor. The RVBUS resistor must be sized to handle the power dissipated across the resistor. The resistor power can be found using the equation below: For example, protecting a peripheral or device only application to 15V would require a 10kΩ RVBUS resistor with a power rating of 0.01W. To protect an OTG product to 15V would require a 1kΩ RVBUS resistor with a power rating of 0.1W. 5.6.3 DRIVING EXTERNAL VBUS The USB3320 monitors VBUS as described in VBUS Monitor and Pulsing. For OTG and Host applications, the system is required to source 5 volts on VBUS. The USB3320 fully supports VBUS power control using an external VBUS switch as shown in Figure 8-3. The USB3320 provides an active high control signal, CPEN, that is dedicated to controlling the Vbus supply when configured as an A-Device. CPEN is asserted by setting the DrvVbus or DrvVbusExternal bit of the OTG Control register. To be compatible with Link designs that support both internal and external Vbus supplies the DrvVbus and DrvVbusExternal bits in the OTG Control Register are or’d together. This enables the Link to set either bit to access the external Vbus enable (CPEN). This logic is shown in Figure 5-12. DrvVbus and DrvVbusExternal are set to 0 on Power On Reset (POR) as shown in Section 7.1.1.7. TABLE 5-7: REQUIRED RVBUS RESISTOR VALUE Operating Mode RVBUS Device only 10kΩ ±5% OTG Capable 1kΩ ±5% Host UseExternalVbusIndicator = 1 10kΩ ±5% P RVBUS Vprotect 5.0 – () 2 R VBUS -------------------------------------------- = Where: • Vprotect is the VBUS protection required •RVBUS is the resistor value, 1kΩ or 10kΩ. •PRVBUS is the required power rating of RVBUS |
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