| 数据搜索系统,热门电子元器件搜索 |
|
USB3320 数据表(PDF) 39 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
USB3320 数据表(HTML) 39 Page - Microchip Technology |
|
39 / 70 page ![]() 2014-2015 Microchip Technology Inc. DS00001792B-page 39 USB3320 If an RXCMD event occurs during a USB transmit, the RXCMD is blocked until STP de-asserts at the end of the transmit. The RXCMD contains the status that is current at the time the RXCMD is sent. Note 1: An ‘X’ is a do not care and can be either a logic 0 or 1. 2: The value of VbusValid is defined in Table 5-6. Note 6-1 LineState: These bits in the RXCMD byte reflect the current state of the Full-Speed single ended receivers. LineState[0] directly reflects the current state of DP. LineState[1] directly reflects the current state of DM. When DP=DM=0 this is called "Single Ended Zero" (SE0). When DP=DM=1, this is called "Single Ended One" (SE1). 6.2.4 USB3320 TRANSMITTER The USB3320 ULPI transmitter fully supports HS, FS, and LS transmit operations. Figure 6-1 shows the high speed, full speed, and low speed transmitter block controlled by ULPI Protocol Block. Encoding of the USB packet follows the bit- stuffing and NRZI outlined in the USB 2.0 specification. Many of these functions are re-used between the HS and FS/LS transmitters. When using the USB3320, Table 5-1 should always be used as a guideline on how to configure for various modes of operation. The transmitter decodes the inputs of XcvrSelect[1:0], TermSelect, OpMode[1:0], DpPulldown, and DmPulldown to determine what operation is expected. Users must strictly adhere to the modes of operation given in Table 5-1. Several important functions for a device and host are designed into the transmitter blocks. The USB3320 transmitter will transmit a 32-bit long high speed sync before every high speed packet. In full and low speed modes a 8-bit sync is transmitted. When the device or host needs to chirp for high speed port negotiation, the OpMode = 10b setting in the Function Con- trol register will turn off the bit-stuffing and NRZI encoding in the transmitter. At the end of a chirp, the USB3320 OpMode bits should be changed only after the RXCMD linestate encoding indicates that the transmitter has completed transmit- ting. Should the opmode be switched to normal bit-stuffing and NRZI encoding before the transmit pipeline is empty, the remaining data in the pipeline may be transmitted in an bit-stuff encoding format. Please refer to the ULPI specification for a detailed discussion of USB reset and HS chirp. TABLE 6-3: ULPI RX CMD ENCODING Data[7:0] Name Description and Value [1:0] Linestate UTMI Linestate Signals Note 6-1 [3:2] Encoded VBUS State ENCODED VBUS VOLTAGE STATES VALUE VBUS VOLTAGE SESSEND SESSVLD VBUSVLD2 00 VVBUS < VSESS_END 10 0 01 VSESS_END < VVBUS < VSESS_VLD 00 0 10 VSESS_VLD < VVBUS < VVBUS_VLD X1 0 11 VVBUS_VLD < VVBUS XX 1 [5:4] Rx Event Encoding ENCODED UTMI EVENT SIGNALS VALUE RXACTIVE RXERROR HOSTDISCONNECT 00 0 0 0 01 1 0 0 11 1 1 0 10 X X 1 [6] State of ID pin Set to the logic state of the ID pin. A logic low indicates an A device. A logic high indicates a B device. [7] alt_int Asserted when a non-USB interrupt occurs. This bit is set when an unmasked event occurs on any bit in the Carkit Interrupt Latch register. The Link must read the Carkit Interrupt Latch register to determine the source of the interrupt. Section 5.6.1.3 describes how a change on the ID pin can generate an interrupt. Section 6.6 describes how an interrupt can be generated when the RidConversionDone bit is set. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |