USB3320 datasheet(4/70 Pages) MICROCHIP

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USB3320

DS00001792B-page 4

 2014-2015 Microchip Technology Inc.

1.0

INTRODUCTION

1.1

General Description

The Microchip USB3320 is a Hi-Speed USB 2.0 Transceiver that provides a configurable physical layer (PHY) solution

and is an excellent match for a wide variety of products.

The frequency of the reference clock is user selectable. The USB3320 includes an internal oscillator that may be used

with either a quartz crystal or a ceramic resonator. Alternatively, the crystal input can be driven by an external clock oscil-

lator. Another option is the use of a 60MHz external clock when using the ULPI Input Clock mode.

Several advanced features make the USB3320 the transceiver of choice by reducing both electrical bill of material

(eBOM) part count and printed circuit board (PCB) area. Outstanding ESD robustness eliminates the need for external

ESD protection devices in typical applications. The internal Over-Voltage Protection circuit (OVP) protects the USB3320

from voltages up to 30V. By using a reference clock from the Link, the USB3320 removes the cost of a dedicated crystal

reference from the design. And the integrated USB switch enables unique product features with a single USB port of

connection.

The USB3320 meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device, or an On-the-Go

(OTG) transceiver. In addition to the supporting USB signaling, the USB3320 also provides USB UART mode and USB

Audio mode.

USB3320 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB Transceiver to the Link. ULPI

uses a method of in-band signaling and status byte transfers between the Link and transceiver to facilitate a USB ses-

sion with only 12 pins.

The USB3320 uses Microchip’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-less” tech-

nology allows the transceiver to achieve a low latency transmit and receive time. Microchip’s low latency transceiver

allows an existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing

and proven UTMI Link IP can be reused.

FIGURE 1-1:

USB3320 BLOCK DIAGRAM

OTG

Hi-Speed

USB

Transceiver

ULPI Interface

ULPI

Registers

and State

Machine

BIAS

Crystal

Oscillator and

Low Jitter

Integrated

PLL

Integrated

Power

Management

VBUS

RBIAS

REFCLK

DATA[7:0]

CPEN

RESETB

VDD18

VDD33

VBAT

DIR

NXT

STP

CLKOUT

USB

DP/DM

Switch

VDDIO

REFSEL[2:0]

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