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USB3320 数据表(PDF) 49 Page - Microchip Technology |
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USB3320 数据表(HTML) 49 Page - Microchip Technology |
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49 / 70 page  2014-2015 Microchip Technology Inc. DS00001792B-page 49 USB3320 7.0 ULPI REGISTER MAP 7.1 ULPI Register Array The USB3320 Transceiver implements all of the ULPI registers detailed in the ULPI revision 1.1 specification. The com- plete USB3320 ULPI register set is shown in Table 7-1. All registers are 8 bits. This table also includes the default state of each register upon POR or de-assertion of RESETB, as described in Section 5.5.2. The RESET bit in the Function Control Register does not reset the bits of the ULPI register array. The Link should not read or write to any registers not listed in this table. The USB3320 supports extended register access. The immediate register set (00-3Fh) can be accessed through either a immediate address or an extended register address. Note 7-1 Dynamically updates to reflect current status of interrupt sources. TABLE 7-1: ULPI REGISTER MAP Register Name Default State Address (6bit) Read Write Set Clear Vendor ID Low 24h 00h --- Vendor ID High 04h 01h --- Product ID Low 07h 02h --- Product ID High 00h 03h --- Function Control 41h 04-06h 04h 05h 06h Interface Control 00h 07-09h 07h 08h 09h OTG Control 06h 0A-0Ch 0Ah 0Bh 0Ch USB Interrupt Enable Rising 1Fh 0D-0Fh 0Dh 0Eh 0Fh USB Interrupt Enable Falling 1Fh 10-12h 10h 11h 12h USB Interrupt Status (Note 7-1) 00h 13h --- USB Interrupt Latch 00h 14h --- Debug 00h 15h --- Scratch Register 00h 16-18h 16h 17h 18h Carkit Control 00h 19-1Bh 19h 1Ah 1Bh Reserved 00h 1Ch Carkit Interrupt Enable 00h 1D-1Fh 1Dh 1Eh 1Fh Carkit Interrupt Status 00h 20h --- Carkit Interrupt Latch 00h 21h --- Reserved 00h 22-30h HS TX Boost 00h 31h 31h - - Reserved 00h 32h 32h - - Headset Audio Mode 00h 33h 33h - - Reserved 00h 34-35h Vendor Rid Conversion 00h 36-38h 36h 37h 38h USB IO & Power Management 04h 39-3Bh 39h 3Ah 3Bh Reserved 00h 3C-3Fh |
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