USB3320 datasheet(58/70 Pages) MICROCHIP

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USB3320

DS00001792B-page 58

 2014-2015 Microchip Technology Inc.

8.0

APPLICATION NOTES

8.1

Application Diagram

The USB3320 requires few external components as shown in the application diagrams. The USB 2.0 Specification

restricts the voltage at the VBUS pin to a maximum value of 5.25V. In some applications, the voltage will exceed this

voltage, and the USB3320 provides an integrated overvoltage protection circuit. The overvoltage protection circuit works

with an external resistor (RVBUS) to lower the voltage at the VBUS pin, as described in Section 5.6.2.6.

Following POR or hardware reset, the voltage at CLKOUT must not exceed VIH_ED as provided in Table 4-4.

TABLE 8-1:

COMPONENT VALUES IN APPLICATION DIAGRAMS

Reference

Designator

Value

Description

Notes

COUT

2.2

μF

Bypass capacitor to ground (<1

Ω ESR) for

regulator stability.

Place as close as possible to the

transceiver.

CVBUS

See Table 8-2

Capacitor to ground required by the USB

Specification. Microchip recommends <1

ESR.

Place near the USB connector.

CBYP

System

dependent.

Bypass capacitor to ground. Typical

values used are 0.1 or 0.01

μF.

Place as close as possible to the

transceiver.

CDC_LOAD

System

dependent.

The USB connector housing may be AC-

coupled to the device ground.

Industry convention is to ground

only the host side of the cable

shield.

RVBUS

Ω or 10kΩ

Series resistor to work with internal

overvoltage protection.

10k

Ω in device applications.

See Table 5-7 for required values in Host

or OTG applications.

See Section 5.6.2.6 for information

regarding power dissipation.

RBIAS

8.06k

Ω (±1%)

Series resistor to establish reference

voltage.

See Section 5.3 for information

regarding power dissipation.

TABLE 8-2:

CAPACITANCE VALUES AT VBUS OF USB CONNECTOR

Mode

MIN Value

MAX Value

Host

120

μF

Device

μF10μF

OTG

μF6.5μF

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