USB3320 datasheet(41/70 Pages) MICROCHIP

41 / 70 page

 2014-2015 Microchip Technology Inc.

DS00001792B-page 41

USB3320

During transmit the transceiver will use NXT to control the rate of data flow into the transceiver. If the USB3320 pipeline

is full or bit-stuffing causes the data pipeline to overfill NXT is de-asserted and the Link will hold the value on Data until

NXT

is asserted. The USB Transmit ends when the Link asserts STP while NXT is asserted.

After the USB3320 completes transmitting, the DP and DM lines return to idle and a RXCMD is returned to the Link so

the inter-packet timers may be updated by linestate.

While operating in Full Speed or Low Speed, an End-of-Packet (EOP) is defined as SE0 for approximately two bit times,

followed by J for one bit time. The transceiver drives a J state for one bit time following the SE0 to complete the EOP.

The Link must wait for one bit time following line state indication of the SE0 to J transition to allow the transceiver to

complete the one bit time J state. All bit times are relative to the speed of transmission.

In the case of Full Speed or Low Speed, after STP is asserted each FS/LS bit transition will generate a RXCMD since

the bit times are relatively slow.

6.2.5

USB RECEIVER

The USB3320 ULPI receiver fully supports HS, FS, and LS transmit operations. In all three modes the receiver detects

the start of packet and synchronizes to the incoming data packet. In the ULPI protocol, a received packet has the priority

and will immediately follow register reads and RXCMD transfers. Figure 6-8 shows a basic USB packet received by the

USB3320 over the ULPI interface.

FIGURE 6-7:

ULPI TRANSMIT IN SYNCHRONOUS MODE

Note:

The Link cannot assert STP with NXT de-asserted since the USB3320 is expecting to fetch another byte

from the Link.

DATA[7:0]

DP/DM

DIR

CLK

STP

NXT

TXD CMD

(USB tx)

Idle

IDLE

SE0

!SQUELCH

SE0

Turn

Around

Turn

Around

RXD

CMD

USB3320 数据表(PDF) 41 Page - Microchip Technology

USB3320 数据表(HTML) 41 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

数据表下载