 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
USB3320 数据表(PDF) 54 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
USB3320 数据表(HTML) 54 Page - Microchip Technology |
|
|
54 / 70 page  USB3320 DS00001792B-page 54 2014-2015 Microchip Technology Inc. 7.1.1.13 Scratch Register Address = 16-18h (read), 16h (write), 17h (set), 18h (clear) 7.1.2 CARKIT CONTROL REGISTERS The following registers are used to set-up and enable the USB UART and USB Audio functions. 7.1.2.1 Carkit Control Address = 19-1Bh (read), 19h (write), 1Ah (set), 1Bh (clear) This register is used to program the USB3320 into and out of the Carkit Mode. When entering the UART mode the Link must first set the desired TxdEn and the RxdEn bits and then transition to Carkit Mode by setting the CarkitMode bit in the Interface Control Register. When RxdEn is not set then the DATA[1] pin is held to a logic high. If using USB UART mode the UART data will appear at the SPK_L and SPK_R pins if the corresponding SpkLeftEn, SpkRightEn , or MicEn switches are enabled. If using USB Audio the TxdEn and RxdEn bits should not be set when the SpkLeftEn, SpkRightEn, or MicEn switches are enabled. The USB single-ended receivers described in Section 5.2.1 are disabled when either SpkLeftEn, SpkRightEn , or MicEn are set. 7.1.2.2 Carkit Interrupt Enable Address = 1D-1Fh (read), 1Dh (write), 1Eh (set), 1Fh (clear) Field Name Bit Access Default Description Scratch 7:0 rd/w/s/c 00h Empty register byte for testing purposes. Software can read, write, set, and clear this register and the transceiver functionality will not be affected. Field Name Bit Access Default Description CarkitPwr 0 rd 0b Read only, 0. IdGndDrv 1 rd/w/s/c 0b Drives ID pin to ground TxdEn 2 rd/w/s/c 0b Connects UART TXD (DATA[0]) to DM RxdEn 3 rd/w/s/c 0b Connects UART RXD (DATA[1]) to DP SpkLeftEn 4 rd/w/s/c 0b Connects DM pin to SPK_L pin SpkRightEn 5 rd/w/s/c 0b Connects DP pin to SPK_R pin. See Note below. MicEn 6 rd/w/s/c 0b Connects DP pin to SPK_R pin. See Note below. Reserved 7 rd 0b Read only, 0. Note: If SpkRightEn or MicEn are asserted the DP pin will be connected to SPK_R. To disconnect the DP pin from the SPK_R pin both SpkrRightEn and MicEn must be set to de-asserted. Field Name Bit Access Default Description IdFloatRise 0 rd/w/s/c 0b When enabled an interrupt will be generated on the alt_int of the RXCMD byte when the ID pin transitions from non-floating to floating. The IdPullup bit in the OTG Control register should be set. IdFloatFall 1 rd/w/s/c 0b When enabled an interrupt will be generated on the alt_int of the RXCMD byte when the ID pin transitions from floating to non-floating. The IdPullup bit in the OTG Control register should be set. CarIntDet 2 rd 0b Not Implemented. Reads as 0b. CarDpRise 3 rd 0b Not Implemented. Reads as 0b. CarDpFall 4 rd 0b Not Implemented. Reads as 0b. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
