STA310 datasheet(27/90 Pages) STMICROELECTRONICS

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STA310

5.4.1 Output precision and format selection

Output precision is selectable from 16 bits/word to 24 bits/word by setting the output precision select, in the PC-

MCONF (16-, 18-, 20- and 24-bit mode) register.

In 16-bit mode, data may be output either with the most significant bit first or least significant bit first. This is

configured by the contents of the field ORD in the PCMCONF register.

When PCMCONF.PREC is more than 16 bits, 32 bits are output for each channel. In this configuration, the field

FOR of register PCMCONF is used to select Sony or I²S- compatible format. The field DIF of PCMCONF is used

to position the 18, 20 or 24 bits either at the beginning or at the end of each 32-bit frame.

Figure 15. Output formats

M CONF.PEC

PCM

CONF.ORD

PCM

CONF.FOR

PCM

CONF.DIF

DATA IN SAMPLE

MEMORY DATA

[23:0]

DATA SENT ON THE

PCM SERIAL OUTPUT

(LEFT BIT FIRST)

0:16-bit mode

{d23-d8}-{8*0}

{d8-d23}: 16 bits

0:16-bit mode

{d23-d8}-{8*0}

{d23-d8}: 16 bits

1:18-bit mode

{d23-d6}-{6*0}

{13*0}{0}{d23-d6}: 32 bits

1:18-bit mode

{d23-d6}-{6*0}

{0}{d23-d6}{13*0}: 32 bits

1:18-bit mode

{d23-d6}-{6*0}

{14*d23}{d26*d6}: 32 bits

1:18-bit mode

{d23-d6}-{6*0}

{d23-d6}{14*0}: 32 bits

2:20-bit mode

{d23-d4}-{4*0}

{11*0}{0}{d23-d4}: 32 bits

2:20-bit mode

{d23-d4}-{4*0}

{0}{d23-d4}{11*0}: 32 bits

2:20-bit mode

{d23-d4}-{4*0}

{12*d23}{d23-d4}: 32 bits

2:20-bit mode

{d23-d4}-{4*0}

{d23-d4}{12*0}: 32 bits

3:24-bit mode

{d23-d0}

{6*0}{0}{d23-d0}: 32 bits

3:24-bit mode

{d23-d0}

{0}{d23-d0}{7*0}: 32 bits

3:24-bit mode

{d23-d0}

{8*d23}{d23-d0}: 32 bits

3:24-bit mode

{d23-d0}

{d23-d0}{8*0}: 32 bits

LRCLK

PCM_OUT[2:0]

LRCLK

PCM_OUT[2:0]

16 SCLK cycles

32 SCLK cycles

PCMCONF.ORD = 0, PCMCONF.PREC is 16 bits mode

PCMCONF.ORD = 1, PCMCONF.PREC is 16 bits mode

18, 20 or 24 bits

MSB

PCMCONF.FOR = 1

PCMCONF.DIF = 1

PCMCONF.FOR = 0

PCMCONF.DIF = 0

PCMCONF.FOR = 0

PCMCONF.DIF = 1

PCMCONF.FOR = 1

PCMCONF.DIF = 0

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