数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

STA310 数据表(PDF) 28 Page - STMicroelectronics

部件名 STA310
功能描述  62-CH. MULTISTANDARD AUDIO DECODER
PDF  90 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA310 数据表(HTML) 28 Page - STMicroelectronics

Back Button STA310 Datasheet HTML 24Page - STMicroelectronics STA310 Datasheet HTML 25Page - STMicroelectronics STA310 Datasheet HTML 26Page - STMicroelectronics STA310 Datasheet HTML 27Page - STMicroelectronics STA310 Datasheet HTML 28Page - STMicroelectronics STA310 Datasheet HTML 29Page - STMicroelectronics STA310 Datasheet HTML 30Page - STMicroelectronics STA310 Datasheet HTML 31Page - STMicroelectronics STA310 Datasheet HTML 32Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 90 page
background image
STA310
28/90
How to read the above table:
The first 4 columns list the possible configurations for output formats on the PCM outputs. The 5th column gives
the description of the internal 24-bit decoded, scaled and rounded audio samples as they are stored in memory.
These 24 bits are referred to as d23, d22,..., d0, where MSB=d23, LSB=d0. The last column describes the se-
quence of bits that are output on PCM_OUT according to the selected format.
Example 1: in 16-bit mode, with PCMCONF.ORD=1: In memory, 24 bits are stored, where only the 16 MSB bits
(d23, d22,... to d8) are significant and the 8 remaining bits are 0. This is noted: {d23-d8} {8*0}. The data are sent
LSB first, i.e. d8 is sent first and d23 is sent last. This is noted {d8-d23}. 16 bits only are transmitted per channel.
Example 2: in 20-bit mode (PCMCONF.ORD field is meaningless in this mode), with PCMCONF.FOR=1 and
PCMCONF.DIF=0: In memory, 24 bits are stored, where only the 20 MSB (d23 to d4) are significant and the
remaining 4 LSB are 0.This is noted: {d23-d4} {4*0}. 32 bits are transmitted per channel on the PCM outputs:
the 12 first transmitted bits are d23, the last bits are d23 to d4, where d23 is transmitted first. This is noted:
{12*d23} {d23-d4}.
5.4.2 Clocks polarity selection
The polarity of the PCM serial output clock, SCLK and the polarity of the PCM word clock LRCLK are selected
by the field SCL and INV respectively, in the PCMCONF register.
5.4.3 I2S format compatible outputs
To output I²S compatible data, the PCMCONF register must be configured as follows
5.4.4 Sony format compatible outputs
Figure 16. SCLK Polarity
Figure 17. LRCLK Polarit
y
PCMCONF.DIF
= 1
not right padded,
PCMCONF.FOR
= 0
I²S format,
PCMCONF.INV
= 0
do not invert LRCLK,
PCMCONF.SCL
= 0
do not invert SCLK.
PCMCONF.FOR
= 1
Sony format,
PCMCONF.INV
= 1
Invert LRCLK.
SCLK
LRCLK
PCM_OUT0, 1, 2
SCL = 0
SCLK
LRCLK
PCM_OUT0, 1, 2
SCL = 1
LRCLK
Left
Right
Left
Right
INV = 1
INV = 0



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com