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STA310 数据表(PDF) 52 Page - STMicroelectronics

部件名 STA310
功能描述  62-CH. MULTISTANDARD AUDIO DECODER
PDF  90 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA310 数据表(HTML) 52 Page - STMicroelectronics

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STA310
52/90
The feature is only available for STA310 cut 2.0. This
register is used to configure the Left/Right sample
alignement of the S/PDIF. Typical value is 10
9.9 Audio command registers
SOFTRESET
Soft reset
Address: 0x10
Type: W0
Software Reset: NA
Hardware: Reset: NA
Description:
When bit 0 of this register is set, a soft reset occurs.
The command registers and the interrupt registers
listed below are cleared.
The decoder goes into idle mode and the volumes
are cleared.
Command registers:
MUTE,
RUN,
PLAY,
SKIP_MUTE_CMD
and
SKIP_MUTE_VALUE
Interrupt registers:
INTE, INT and ERROR
PLAY
Play
Address: 0x13
Type: R/W
Software Reset: 0
Hardware: Reset: 0
Description:
The PLAY command is treated according to the state
of the decoder:
s
When in idle mode, the PLAY value is not taken
into account by the decoder.
s
When in init mode, the PLAY value is not taken
into account by the decoder.
s
When in decode mode, PLAY enables the
decoding, see table below:
MUTE
Mute
Address: 0x14
Type: R/W
Software Reset: 0
Hardware: Reset: 0
Description:
The MUTE command is handled differently according
to the state of the decoder:
s
When in idle mode after hardware reset, setting
MUTE to “1” automatically runs the DAC_SCLK
and DAC_LRCLK clocks and outputs them to
the DACs.
s
When playing, setting MUTE to “1” mutes the
PCM outputs.
s
The MUTE register has no effect on the SPDIF
output.
RUN
RUN decoding
Address: 0x72
76
54
321
0
76
543
2
1
0
PLAY
PLAY
value
MUTE
value
DAC_SCLK,
DAC_LRCLK
state
DAC_PC
MOUT
Decoding
0
0
Not running
0
No
0
1
Running
0
No
1
0
Running
Decoded
samples
Yes
1
1
Running
0
Yes
76
5
4
3
2
1
0
MUTE
7
6
5
4
321
0
RUN



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