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STA310 数据表(PDF) 55 Page - STMicroelectronics |
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STA310 数据表(HTML) 55 Page - STMicroelectronics |
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55 / 90 page  55/90 STA310 Description: This register indicates the status of the audio parser for synchronization. It is used in conjunction with PACKET_LOCK and SYNCK_LOCK registers. On read the synchronization status interrupt bit is cleared (INT.SYN is cleared). ANCCOUNT Ancillary data Address: 0x41 Type: RO Software Reset: UND Hardware Reset: UND Description: This value gives the number of ancillary data in the stream. The ancillary data interrupt bit ANC of the register is cleared by a read. HEAD4 HEADER 4 register AC_3 MPEG_2 OTHER Address: 0x42 Type: RO Software Reset: UND Hardware Reset: UND Description: This register contains header data HEAD[31:24]. The contents depend on the type of the frame.HEAD4[7:3] = 00000, in all cases. When the host reads this register, the corresponding interrupt bit (HDR) is cleared. Dolby Digital MPEG-2 OTHER In all other types of frame HEAD4[2:0] = “000” HEAD3 HEADER 3 register Address: 0x43 Type: RO Software Reset: UND Hardware Reset: UND Description: Bitfield Description FRA Frame Status 0 0: Research audio synchronization 0 1: Wait for confirmation - a synchro word has been detected but the parser has not yet detected SYNC-LOCK+1 synchro words. 1 0: Synchronized - SYNC_LOCK + 1 synchro words have been detected 1 1: Not used PAC Packet Status 0 0: Research packet synchronization word 0 1: Wait for confirmation - - a synchro word has been detected but the parser has not yet detected PACKET_LOCK+1 synchro words. 1 0: Synchronized - PACKET_LOCK + 1 synchro words have been detected 1 1: Not used 76 5 4 32 1 0 76 54 3 2 1 0 00 00 0 BSMOD 00 00 0 0 DR K 0 0 0 0 0 000 Bitfield Description HEAD4[2:0] BSMOD if an Dolby Digital frame Bitfield Description HEAD4[2] 0 HEAD4[1] DR=1 Dynamic range exists HEAD4[0] K=0 in normal mode, K=1 in Karaoke mode. 76 5 4 3 2 1 0 0 0 0 DTYPE |
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