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ST7MC1K2-Auto 数据表(PDF) 75 Page - STMicroelectronics |
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ST7MC1K2-Auto 数据表(HTML) 75 Page - STMicroelectronics |
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75 / 371 page  Obsolete Product(s) - Obsolete Product(s) ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto Power saving modes 75/371 Figure 25. TActive HALT mode flow-chart 1. Peripherals clocked with an external clock source can still be active. 2. Only the MCC/RTC interrupt and some specific interrupts can exit the MCU from Active Halt mode (such as external interrupt). Refer to Table 22: Interrupt mapping on page 70 for more details. 3. Before servicing an interrupt, the CC register is pushed on the stack. The I[1:0] bits of the CC register are set to the current software priority level of the interrupt routine and restored when the CC register is popped. HALT instruction Reset Interrupt(2) Y N N Y Fetch reset vector or service interrupt 256 or 4096 CPU clock cycle delay (MCCSR.OIE = 1 CPU Oscillator Peripherals(1) I[1:0] bits On Off 10 Off CPU Oscillator Peripherals I[1:0] bits On Off XX(3) On CPU Oscillator Peripherals I[1:0] bits On On XX(3) On Obsolete Product(s) - Obsolete Product(s) |
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