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ST7MC1K2-Auto 数据表(PDF) 96 Page - STMicroelectronics

部件名 ST7MC1K2-Auto
功能描述  Clock, reset and supply management
PDF  371 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7MC1K2-Auto 数据表(HTML) 96 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
On-chip peripherals
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
96/371
Figure 36.
PWM auto-reload timer function
Figure 37.
PWM signal from 0% to 100% duty cycle
Output compare and time base interrupt
On overflow, the OVF flag of the ARTCSR register is set and an overflow interrupt request is generated if
the overflow interrupt enable bit, OIE, in the ARTCSR register, is set. The OVF flag must be reset by the
user software. This interrupt can be used as a time base in the application.
External clock and event detector mode
Using the fEXT external prescaler input clock, the auto-reload timer can be used as an external clock
event detector. In this mode, the ARTARR register is used to select the nEVENT number of events to be
counted before setting the OVF flag.
nEVENT = 256 - ARTARR
Caution:
The external clock function is not available in Halt mode. If Halt mode is used in the
application, prior to executing the HALT instruction, the counter must be disabled by clearing
the TCE bit in the ARTCSR register to avoid spurious counter increments.
Duty cycle
register
Auto-reload
register
t
255
000
With OEx = 1
and OPx = 0
(ARTARR)
(PWMDCRx)
With OEx = 1
and OPx = 1
Counter
PWMx output
t
with OEx = 1
and OPx = 0
FDh
FEh
FFh
FDh
FEh
FFh
FDh
FEh
OCRx = FCh
OCRx = FDh
OCRx = FEh
OCRx = FFh
fCOUNTER
ARTARR = FDh
Obsolete
Product(s)
- Obsolete
Product(s)



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