ST7MC1K2-Auto datasheet(40/371 Pages) STMICROELECTRONICS

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Central processing unit

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5.3.5

Stack pointer register (SP)

The stack pointer is a 16-bit register which always points to the next free location in the

stack. It is decremented after data has been pushed onto the stack and incremented before

data is popped from the stack (see Figure 8).

Since the stack is 256 bytes deep, the 8 most significant bits are forced by hardware.

Following an MCU reset, or after a reset stack pointer instruction (RSP), the stack pointer

contains its reset value (the SP7 to SP0 bits are set) which is the stack higher address.

The LSB of the stack pointer (called S) can be directly accessed by an LD instruction.

Note:

When the lower limit is exceeded, the stack pointer wraps around to the stack upper limit,

without indicating the stack overflow. The previously stored information is then overwritten

and therefore lost. The stack also wraps in case of an underflow.

The stack is used to save the return address during a subroutine call and the CPU context

during an interrupt. The user may also directly manipulate the stack by means of the push

and pop instructions. In the case of an interrupt, the PCL is stored at the first location

(zero)

Arithmetic management bit

This bit is set and cleared by hardware. This bit indicates that the result of the

last arithmetic, logical or data manipulation is zero.

0: The result of the last operation is different from zero

1: The result of the last operation is zero

This bit is accessed by the JREQ and JRNE test instructions.

(carry/borrow)

Arithmetic management bit

This bit is set and cleared by hardware and software. It indicates an overflow

or an underflow has occurred during the last arithmetic operation.

0: No overflow or underflow has occurred

1: An overflow or underflow has occurred

This bit is driven by the SCF and RCF instructions and tested by the JRC and

JRNC instructions. It is also affected by the “bit test and branch”, shift and

rotate instructions.

Table 5.

CC register description (continued)

Bit

Name

Function

Reset value: 01 FFh

R/W

654

SP[7:0]

R/W

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