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ST7MC1K2-Auto 数据表(PDF) 83 Page - STMicroelectronics |
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ST7MC1K2-Auto 数据表(HTML) 83 Page - STMicroelectronics |
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83 / 371 page ![]() Obsolete Product(s) - Obsolete Product(s) ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto I/O ports 83/371 9.5 Interrupts The external interrupt event generates an interrupt if the corresponding configuration is selected with DDR and OR registers and the interrupt mask in the CC register is not active (RIM instruction). 9.5.1 I/O port implementation The I/O port register configurations are summarized below. Standard ports Interrupt ports Table 28. I/O port interrupt control/wake-up capability Interrupt event Event flag Enable control bit Exit from WAIT Exit from HALT External interrupt on selected external event - DDRx, ORx Yes Table 29. Standard ports: PA4, PA2:0, PB5:0, PC7:4, PD7:6, PE5:0, PF5:0, PG7:0, PH7:0 Mode DDR OR Floating input 0 0 Pull-up input 0 1 Open drain output 1 0 Push-pull output 1 1 Table 30. Interrupt ports with pull-up: PA6, PA3, PB6, PC3, PC1, PD5, PD4, PD2 Mode DDR OR Floating input 0 0 Pull-up interrupt input 0 1 Open drain output 1 0 Push-pull output 1 1 Table 31. Interrupt ports without pull-up: PA7, PA5, PB7, PC2, PC0, PD6, PD3, PD Mode DDR OR Floating input 0 0 Floating interrupt input 0 1 Open drain output 1 0 Push-pull output 1 1 Obsolete Product(s) - Obsolete Product(s) |
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