ST7MC1K2-Auto datasheet(42/371 Pages) STMICROELECTRONICS

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Supply, reset and clock management

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto,

42/371

Supply, reset and clock management

6.1

Introduction

The device includes a range of utility features for securing the application in critical

situations (for example in case of a power brown-out), and reducing the number of external

components. An overview is shown in Figure 9.

For more details, refer to dedicated parametric section.

6.2

Main features

●

Reset sequence manager (RSM)

●

1 crystal/ceramic resonator oscillator

●

System integrity management (SI)

–

Main supply low voltage detection (LVD)

–

Auxiliary voltage detector (AVD) with interrupt capability for monitoring the main

supply

–

Clock security system (CSS) with the VCO of the PLL, providing a backup safe

oscillator

–

Clock detector

–

PLL which can be used to multiply the frequency by 2 if the clock frequency input

is 8MHz.

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