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ST7MC1K2-Auto 数据表(PDF) 16 Page - STMicroelectronics

部件名 ST7MC1K2-Auto
功能描述  Clock, reset and supply management
PDF  371 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7MC1K2-Auto 数据表(HTML) 16 Page - STMicroelectronics

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Figure 49.
Output compare timing diagram, fTIMER =fCPU/4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Figure 50.
One pulse mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Figure 51.
One pulse mode timing example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Figure 52.
Pulse width modulation mode timing example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Figure 53.
Pulse width modulation cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Figure 54.
Serial peripheral interface block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Figure 55.
Single master/single slave application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 56.
Generic SS timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 57.
Hardware/software slave select management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Figure 58.
Data clock timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Figure 59.
Clearing the WCOL bit (write collision flag) software sequence . . . . . . . . . . . . . . . . . . . . 134
Figure 60.
Single master/multiple slave configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Figure 61.
SCI block diagram (in conventional baud rate generator mode). . . . . . . . . . . . . . . . . . . . 142
Figure 62.
Word length programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
Figure 63.
SCI baud rate and extended prescaler block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Figure 64.
LIN characters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
Figure 65.
SCI block diagram in LIN slave mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Figure 66.
LIN header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Figure 67.
LIN identifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Figure 68.
LIN header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Figure 69.
LIN synch field measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Figure 70.
LDIV read/write operations when LDUM = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Figure 71.
LDIV read/write operations when LDUM = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Figure 72.
Bit sampling in reception mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
Figure 73.
LSF bit set and clear . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Figure 74.
Chronogram of events (in autoswitched mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184
Figure 75.
Example of command sequence for 6-step mode (typical 3-phase PM BLDC motor
control) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
Figure 76.
Complementary PWM generation for three-phase induction motor . . . . . . . . . . . . . . . . . . . .
(1 phase represented) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
Figure 77.
Typical command signals of a three-phase induction motor. . . . . . . . . . . . . . . . . . . . . . . 188
Figure 78.
Simplified MTC block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
Figure 79.
Input stage in sensorless or sensor mode (bits TES[1:0] = 00) . . . . . . . . . . . . . . . . . . . . 191
Figure 80.
D window and event filter flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
Figure 81.
Z window and event filter flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
Figure 82.
D event generation mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
Figure 83.
Z event generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201
Figure 84.
Protection of ZH event detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
Figure 85.
Adding the delay to sample during ON time for Z detection . . . . . . . . . . . . . . . . . . . . . . . 205
Figure 86.
Sampling out interrupt generation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
Figure 87.
Sampling during ON time at fSCF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
Figure 88.
Functional diagram of Z detection after D event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
Figure 89.
Input stage in speed sensor mode (TES[1:0] bits = 01, 10, 11) . . . . . . . . . . . . . . . . . . . . 209
Figure 90.
Tacho capture events configured by the TES[1:0] bits . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
Figure 91.
Incremental encoder output signals and derived information . . . . . . . . . . . . . . . . . . . . . 210
Figure 92.
Overview of MTIM timer in switched and autoswitched mode . . . . . . . . . . . . . . . . . . . . . 213
Figure 93.
Step ratio functional diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
Figure 94.
CH processor block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
Figure 95.
Output on pins MCDEM and MCZEM with debug option (DG bit = 1) . . . . . . . . . . . . . . . 220
Figure 96.
Simulated demagnetization/zero-crossing event generation (SC = 0) . . . . . . . . . . . . . . . 222
Figure 97.
Simulated commutation event generation with only 1 hall effect sensor (SC bit = 1) . . . . 223
Figure 98.
Simulated commutation and Z event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
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