ST7MC1K2-Auto datasheet(27/371 Pages) STMICROELECTRONICS

27 / 371 page

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Pin description

27/371

(5)

PH7

I/O

Port H7

PE0/OCMP2_B

I/O CT HS X

Port E0

Timer B output

compare 2

PE1/OCMP1_B

I/O CT

Port E1

Timer B output

compare 1

PE2/ICAP2_B

I/O CT

Port E2

Timer B input capture 2

PE3/ICAP1_B/

I/O CT

Port E3

Timer B input capture 1

(5)

PE4/EXTCLK_B

I/O CT

Port E4

Timer B external clock

source

PE5

I/O CT

Port E5

VPP/ICCSEL

Must be tied low. In the

programming mode when

available, this pin acts as the

programming voltage input VPP./

ICC mode pin. See Section 12.9.2

on page 334

MCO0 (HS)

MTC output channel 0

MCO1 (HS)

MTC output channel 1

MCO2 (HS)

MTC output channel 2

On the chip, each I/O port has eight pads. Pads that are not bonded to external pins are in input pull-up configuration after

reset. The configuration of these pads must be kept at reset state to avoid added current consumption. Refer to

Section 15.6 on page 366.

If two alternate function outputs are enabled at the same time on a given pin (for instance, MCPWMV and MCDEM on PD1

on LQFP32), the two signals are ORed on the output pin.

In the interrupt column, ‘eiX’ defines the associated external interrupt vector. If ‘wpu’ is merged with ‘int’, then I/O

configuration is pull-up interrupt input, otherwise the configuration is floating interrupt input.

MCES is a floating input. To disable this function, a pull-up resistor must be used.

Pin(s) not present on package configuration.

OSC1 and OSC2 pins connect a crystal/ceramic resonator or an external source to the on-chip oscillator; see Section 1:

Description and Section 12.5: Clock and timing characteristics for more details.

It is mandatory to connect all available VDD and VDDA pins to the supply voltage and all VSS and VSSA pins to ground.

MCCFI can be mapped on two different pins on 80-, 64- and 56-pin packages. This allows:

- either using PC1 as a standard I/O and mapping MCCFI on OAZ (MCCFI1) with or without using the operational amplifier

(selected case after reset),

- or mapping MCCFI on PC1 (MCCFI0) and using the amplifier for another function. The mapping can be selected in the

MREF register of Motor Control cell (see Motor controller (MTC)) for more details.

Once the MTC peripheral is ON (bits CKE = 1 or DAC = 1 in the register MCRA), the pin PC4 is configured to an alternate

function. PC4 is no longer usable as a digital I/O.

10. MCPWMV is mapped on PC6 on 80 and 64-pin packages and on PD1 on 44,and 32-pins packages. MCPWMW is mapped

on PC7 on 80, 64 and 44-pin packages and on PD0 on 32-pins package.

11. MCZEM is mapped on PF1 on 80, 64 and 56-pin packages and on PD2 on 44 and 32-pins.

MCDEM is mapped on PF0 on 80, 64 and 56-pin packages and on PD1 on 44 and 32-pin packages.

Table 2.

Device pin description(1) (continued)

number

Pin name

Level

Port

Main

function

(after

reset)

Alternate function(2)

Input

Output

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Product(s)

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Product(s)

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