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AT83C5111 数据表(PDF) 81 Page - ATMEL Corporation |
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AT83C5111 数据表(HTML) 81 Page - ATMEL Corporation |
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81 / 86 page ![]() 81 AT8xC5111 4190A–8051–11/02 Figure 10. Clock Waveforms Figure 39 indicates when signals are clocked internally. The time it takes the signals to propagate to the pins, however, ranges from 25 to 125 ns. This propagation delay is dependent on variables such as temperature and pin loading. Propagat ion also varies from output to output and component. Typically though (T A = 25°C fully loaded) RD and WR propagation delays are approximat ely 50ns. The other signals are typically 85 ns. Propagation delays are incorporated in the AC specifications. CLOCK XTAL2 INTERNAL STATE4 STATE5 STATE6 STATE1 STATE2 STATE3 STATE4 STATE5 SERIAL PORT SHIFT CLOCK PORT OPERATION TXD (MODE 0) RXD SAMPLED RXD SAMPLED P1, P3, P4 PINS SAMPLED P1, P3, P4 PINS SAMPLED MOV DEST PORT (P1, P3, P4) (INCLUDES INT0, INT1, TO, T1) OLD DATA NEW DATA P1P2 P1P2 P1P2 P1P2 P1P2 P1P2 P1P2 P1P2 |
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