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AT83C5111 数据表(PDF) 53 Page - ATMEL Corporation

部件名 AT83C5111
功能描述  Low Pin Count 8-bit Microcontroller with A/D Converter
PDF  86 Pages
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制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

AT83C5111 数据表(HTML) 53 Page - ATMEL Corporation

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53
AT8xC5111
4190A–8051–11/02
Figure 6. PCA PWM Mode
An on-board watchdog timer is available with the PCA to improve the reliability of the
system without increasing chip count. Watchdog timers are useful for systems that are
susceptible to noise, power glitches, or electrostatic discharge. Module 4 is the only
PCA module that can be programmed as a watchdog. However, this module can still be
used for other modes if the watchdog is not needed. Figure 22 shows a diagram of how
the watchdog works. The user pre-loads a 16-bit value in the compare registers. Just
like the other compare modes, this 16-bit value is compared to the PCA timer value. If a
match is allowed to occur, an internal reset will be generated. This will not cause the
RST pin to be driven high.
In order to hold off the reset, the user has three options:
1.
Periodically change the compare value so it will never match the PCA timer
2.
Periodically change the PCA timer value so it will never match the compare val-
ues or
3.
Disable the watchdog by clearing the WDTE bit before a match occurs and then
re-enable it
The first two options are more reliable because the watchdog timer is never disabled as
in option #3. If the program counter ever goes astray, a match will eventually occur and
cause an internal reset. The second option is also not recommended if other PCA mod-
ules are being used. Remember, the PCA timer is the time base for all modules;
changing the time base for other modules would not be a good idea. Thus, in most appli-
cations the first solution is the best option.
This watchdog timer won’t generate a reset out on the reset pin.
CL
CCAPnH
CCAPnL
ECOMn
CCAPMn, n = 0 to 4
0xDA to 0xDE
CAPNn
MATn
TOGn
PWMn
ECCFn
CAPPn
8-bit Comparator
CEXn
“0”
“1”
Enable
PCA Counter/Timer
Overflow
<
>



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