AT83C5111 datasheet(46/86 Pages) ATMEL

46 / 86 page

AT8xC5111

4190A–8051–11/02

The CMOD SFR includes three additional bits associated with the PCA (See Figure 19

and Table 33).

•

The CIDL bit which allows the PCA to stop during idle mode.

•

The WDTE bit which enables or disables the watchdog function on module 4.

•

The ECF bit which when set causes an interrupt and the PCA overflow flag CF (in

the CCON SFR) to be set when the PCA timer overflows.

The CCON SFR contains the run control bit for the PCA and the flags for the PCA timer

(CF) and each module (see Table 34).

•

Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by

clearing this bit.

•

Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an

interrupt will be generated if the ECF bit in the CMOD register is set. The CF bit can

only be cleared by software.

•

Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1,

etc.) and are set by hardware when either a match or a capture occurs. These flags

also can only be cleared by software.

The watchdog timer function is implemented in module 4 (see Figure 22).

Table 2. CCON: PCA Counter Control Register

CCON Address OD8H

7654

3210

CCF4

CCF3

CCF2

CCF1

CCF0

Bit

Number

Bit

Mnemonic

Description

7CF

PCA Counter Overflow flag. Set by hardware when the counter rolls over. CF flags

an interrupt if bit ECF in CMOD is set. CF may be set by either hardware or

software but can only be cleared by software.

6CR

PCA Counter Run control bit. Set by software to turn the PCA counter on. Must be

cleared by software to turn the PCA counter off.

Not implemented, reserved for future use

(1).

User software should not write 1s to reserved bits. These bits may be used in future 8051

family products to invoke new features. In that case, the reset or inactive value of the

new bit will be 0, and its active value will be 1. The value read from a reserved bit is

indeterminate.

CCF4

PCA Module 4 interrupt flag. Set by hardware when a match or capture occurs.

Must be cleared by software.

CCF3

PCA Module 3 interrupt flag. Set by hardware when a match or capture occurs.

Must be cleared by software.

CCF2

PCA Module 2 interrupt flag. Set by hardware when a match or capture occurs.

Must be cleared by software.

CCF1

PCA Module 1 interrupt flag. Set by hardware when a match or capture occurs.

Must be cleared by software.

CCF0

PCA Module 0 interrupt flag. Set by hardware when a match or capture occurs.

Must be cleared by software.

AT83C5111 数据表(PDF) 46 Page - ATMEL Corporation

AT83C5111 数据表(HTML) 46 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86

数据表下载

链接网址

AT83C5111 数据表(PDF) 46 Page - ATMEL Corporation

AT83C5111 数据表(HTML) 46 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86

数据表 下载

链接网址

数据表下载