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AT83C5111 数据表(PDF) 43 Page - ATMEL Corporation |
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AT83C5111 数据表(HTML) 43 Page - ATMEL Corporation |
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43 / 86 page  43 AT8xC5111 4190A–8051–11/02 Serial Peripheral Data Register (SPDAT) The Serial Peripheral Data Register (Table 32) is a read/write buffer for the receive data register. A write to SPDAT places data directly into the shift register. No transmit buffer is available in this model. A Read of the SPDAT returns the value located in the receive buffer and not the content of the shift register. Table 5. Serial Peripheral Data Register Reset value = XXXX XXXXb R7:R0: Receive data bits SPCON, SPSTA and SPDAT registers may be read and written at any time while there is no on-going exchange. However, special care should be taken when writing to them while a transmission is on-going: • Do not change SPR2, SPR1 and SPR0 • Do not change CPHA and CPOL • Do not change MSTR • Clearing SPEN would immediately disable the peripheral • Writing to the SPDAT will cause an overflow 7654 3210 R7 R6 R5 R4 R3 R2 R1 R0 |
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