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AT83C5111 数据表(PDF) 59 Page - ATMEL Corporation |
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AT83C5111 数据表(HTML) 59 Page - ATMEL Corporation |
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59 / 86 page  59 AT8xC5111 4190A–8051–11/02 Table 4. ADDH Register ADDH (S:F5h Read Only) ADC Data High byte register Read only register Reset value = 00h Table 5. ADDL Register ADDL (S:F4h Read Only) ADC Data Low byte register Read only register Reset value = xxxx xx00b Table 6. ADCF Register ADCF (S:F6h) ADC Input Select Register 7654 3210 ADAT 9 ADAT 8 ADAT 7 ADAT 6 ADAT 5 ADAT 4 ADAT 3 ADAT 2 Bit Number Bit Mnemonic Description 7 - 0 ADAT9:2 ADC result Bits 9 - 2 7654 3210 - - - - - - ADAT 1 ADAT 0 Bit Number Bit Mnemonic Description 7 - 6 - Reserved The value read from these bits are indeterminate. Do not set these bits. 1 - 0 ADAT1:0 ADC result Bits 1 - 0 7654 3210 SEL7 SEL6 SEL5 SEL4 SEL3 SEL2 SEL1 SEL0 Bit Number Bit Mnemonic Description 7 - 0 SEL7 - 0 Select Input 7 - 0 Set to select bit 7 - 0 as possible input for A/D Cleared to leave this bit free for other function |
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