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AT83C5111 数据表(PDF) 55 Page - ATMEL Corporation |
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AT83C5111 数据表(HTML) 55 Page - ATMEL Corporation |
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55 / 86 page  55 AT8xC5111 4190A–8051–11/02 Figure 1. ADC Description Figure 26 shows the timing diagram of a complete conversion. For simplicity, the figure depicts the waveforms in idealized form and does not provide precise timing informa- tion. For ADC characteristics and timing parameters refer to the Section “AC Characteristics” of the AT8xC5111 datasheet. Figure 2. Timing Diagram Note: Tsetup = 4 µs AIN0/P4.0 AIN1/P4.1 AIN2/P4.2 AIN3/P4.3 AIN4/P4.4 AIN5/P4.5 AIN6/P4.6 AIN7/P4.7 000 001 010 011 100 101 110 111 SCH2 ADCON.2 SCH0 ADCON.0 SCH1 ADCON.1 CONV_CK ADEN ADCON.5 ADSST ADCON.3 ADEOC ADCON.4 ADC Interrupt Request EADC IE1.1 CONTROL AVSS Sample and Hold ADDH Vref R/2R DAC 8 10 + - ADDL 2 SAR ADCIN VAGND VADREF ADEN ADCON.5 ADEN ADSST ADEOC T SETUP TCONV CONV_CK |
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