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AT83C5111 数据表(PDF) 17 Page - ATMEL Corporation |
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AT83C5111 数据表(HTML) 17 Page - ATMEL Corporation |
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17 / 86 page  17 AT8xC5111 4190A–8051–11/02 Table 2. WDTPRG Register WDTPRG Address (0A7h) Reset value = XXX0 0000 Write only register WDT During Power-down and Idle Power-down In Power-down mode the oscillator stops, which means the WDT also stops. While in Power-down mode the user does not need to service the WDT. There are 2 methods of exiting Power-down mode: by a hardware reset or via a level activated external interrupt which is enabled prior to entering Power-down mode. When Power-down is exited with hardware reset, servicing the WDT should occur as normal whenever the AT8xC5111 is reset. Exiting Power-down with an interrupt is significantly different. The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service routine. To ensure that the WDT does not overflow within a few states of exiting of power-down, it is best to reset the WDT just before entering power-down. Idle Mode In Idle mode, the oscillator continues to run. To prevent the WDT from resetting the AT8xC5111 while in Idle mode, the user should always set up a timer that will periodi- cally exit Idle, service the WDT, and re-enter Idle mode. 765 43210 T4 T3 T2 T1 T0 S2 S1 S0 Bit Number Bit Mnemonic Description 7T4 Reserved Do not try to set this bit. 6T3 5T2 4T1 3T0 WDT overflow select bit 0: Overflow after 14 bits 1: Overflow after 10 bits 2 S2 WDT Time-out select bit 2 1 S1 WDT Time-out select bit 1 0 S0 WDT Time-out select bit 0 S2 S1 S0 Selected Time-out with T0 = 0 000 (214 - 1) machine cycles, 16.3 ms at 12 MHz 001 (2 15 - 1) machine cycles, 32.7 ms at 12 MHz 010 (2 16 - 1) machine cycles, 65.5 ms at 12 MHz 011 (217 - 1) machine cycles, 131 ms at 12 MHz 100 (2 18 - 1) machine cycles, 262 ms at 12 MHz 101 (2 19 - 1) machine cycles, 542 ms at 12 MHz 110 (220 - 1) machine cycles, 1.05 s at 12 MHz 111 (2 21 - 1) machine cycles, 2.09 s at 12 MHz |
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