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DS31256 数据表(PDF) 168 Page - Maxim Integrated Products |
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DS31256 数据表(HTML) 168 Page - Maxim Integrated Products |
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168 / 183 page ![]() DS31256 256-Channel, High-Throughput HDLC Controller 168 of 183 13. AC CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS Voltage on Any Lead with Respect to VSS (except VDD) -0.3V to 5.5V Supply Voltage (VDD) with Respect to VSS -0.3V to 3.63V Operating Temperature/Ambient Temperature Under Bias 0°C to +70°C Junction Temperature Under Bias £125°C Storage Temperature Range -55°C to +125°C Soldering Temperature Range See IPC/JEDEC J-STD-020A Specification ESD Tolerance (Note 1) Class 2 (2000V→4000V HBM: 1.5k W, 100pF) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED DC OPERATING CONDITIONS (TA = 0°C to +70°C) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Logic 1 VIH (Notes 2, 3) 1.8 5.5 V Logic 0 VIL (Note 2) -0.3 +0.8 V Supply VDD 3.0 3.6 V DC CHARACTERISTICS (VDD = 3.0V to 3.6V, TA = 0°C to +70°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Current at VDD = 3.6V IDD (Note 4) 500 770 mA Lead Capacitance CIO 7 pF Schmitt Hysteresis VTH 0.6 V Input Leakage IIL (Note 5) -10 +10 mA Input Leakage (with pullups) IILP (Note 5) -500 +500 mA Output Leakage ILO (Note 6) -10 +10 mA Output Current (2.4V) IOH -4.0 mA Output Current (0.4V) IOL +4.0 mA Output Capacitance COUT (Note 1) 25 pF Output Capacitance COUTB (Note 1) 50 pF Note 1: COUTB refers to bus-related outputs (PCI and local bus); COUT refers to all other outputs. Note 2: Assumes a reasonably noise-free environment. Note 3: The PCI 2.1 Specification states that VIH should be VDD/2 in a 3.3V signaling environment, and 2.0V in a 5V signaling environment. Note 4: Measured 550mA with RC0 to RC15 and TC0 to TC15 = 2.048MHz, PCLK = 33MHz, constant traffic on all ports. Note 5: 0V < VIN < VDD Note 6: Outputs in tri-state. Note 7: The typical values listed above are not production tested. Note 8: Dallas Semiconductor Communications devices are tested in accordance with ESDA STM 5.1-1998. |
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