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DS31256 数据表(PDF) 174 Page - Maxim Integrated Products

部件名 DS31256
功能描述  256-Channel, High-Throughput HDLC Controller
PDF  183 Pages
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制造商  MAXIM [Maxim Integrated Products]
网页  https://www.maximintegrated.com/en.html
标志 MAXIM - Maxim Integrated Products

DS31256 数据表(HTML) 174 Page - Maxim Integrated Products

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DS31256 256-Channel, High-Throughput HDLC Controller
174 of 183
AC CHARACTERISTICS: PCI BUS INTERFACE
(VDD = 3.0V to 3.6V, TA = 0°C to +70°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
PCLK Period
t1
(Note 15)
30
40
ns
PCLK Low Time
t2
12
ns
PCLK High Time
t3
12
ns
All PCI Inputs and I/O Setup Time to the
Rising Edge of PCLK
t4
7
ns
All PCI Inputs and I/O Hold Time from the
Rising Edge of PCLK
t5
0
ns
Delay from the Rising Edge of PCLK to
Data Valid on All PCI Outputs and I/O
t6
(Note 16)
2
11
ns
Delay from the Rising Edge of PCLK to
Tri-State on All PCI Outputs and I/O
t7
28
ns
Delay from the Rising Edge of PCLK to
Active from Tri-State on All PCI Outputs
and I/O
t8
2
ns
Note 15: Aggregate, maximum bandwidth and port speed for the DS31256 are directly proportional to PCLK frequency. Ensure that PCLK is
33MHz for maximum throughput.
Note 16: The PCI extension signals PABLAST, PXAS, and PXDS have a 15ns max. These signals are not part of the PCI Specification.
Figure 13-5. PCI Bus Interface AC Timing Diagram
PCLK
PCI Input
& I/O
PCI Output
& I/O
PCI Output &
I/O to Tri-State
PCI Output &
I/O from Tri-State
Tri-State
Tri-State
t4
t5
t6
t7
t8
t1
t2
t3
Data Valid



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