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ADAS1000-4BSTZ 数据表(PDF) 27 Page - Analog Devices |
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ADAS1000-4BSTZ 数据表(HTML) 27 Page - Analog Devices |
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27 / 80 page ![]() Data Sheet ADAS1000-3/ADAS1000-4 21B ECG INPUTS—ELECTRODES/LEADS The ADAS1000-3/ADAS1000-4 ECG product consists of three ECG inputs and a reference drive, RLD (right leg drive). In a typical 3-lead/vector application, three of the ECG inputs (ECG3_RA, ECG1_LA, ECG2_LL) are used in addition to the RLD path. In a 3-lead system, the ADAS1000-3/ADAS1000-4 can be arranged to provide Lead I, Lead II, and Lead III data or electrode data directly via the serial interface at all frame rates. Note that in 128 kHz data rate, lead data is only available when configured in analog lead mode. Digital lead mode is not available for this data rate. Should the user have a need for increased electrode counts, then there are other products within the ADAS1000 family that may be suitable. For example, a derived 12-lead (8-electrode) system can be achieved using one ADAS1000-3 or ADAS1000-4 device ganged together with one ADAS1000-2 slave device as described in the Gang Mode Operation section. Similarly, a 12-lead (10-electrode) system can be achieved using one ADAS1000 or ADAS1000-1 device ganged together with one ADAS1000-2 slave device as described in the Gang Mode Operation section. Here, nine ECG electrodes and one RLD electrode achieve the 10 electrode system, again leaving one spare ECG channel that could be used for alternate purposes as suggested previously. In such a system, having nine dedi- cated electrodes benefits the user by delivering lead information based on electrode measurements and calculations rather than deriving leads from other lead measurements. Table 10 outlines the calculation of the leads (vector) from the individual electrode measurements when using either the ADAS1000-3 or ADAS1000-4. Table 10. Lead Composition Device Lead Name Composition Equivalent ADAS1000-3 or ADAS1000-4 I LA – RA II LL – RA III LL – LA aVR1 RA – 0.5 × (LA + LL) −0.5 × (I + II) aVL1 LA – 0.5 × (LL + RA) 0.5 × (I − III) aVF1 LL – 0.5 × (LA + RA) 0.5 × (II + III) 1 These augmented leads are not calculated within the ADAS1000-3/ADAS1000-4, but can be derived in the host DSP/microcontroller/FPGA. Rev. B | Page 27 of 80 |
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