ADAS1000-4BSTZ datasheet(75/80 Pages) AD

75 / 80 page

Data Sheet

ADAS1000-3/ADAS1000-4

98B

Example 4: Configure 150 Hz Test Tone Sine Wave on

Each ECG Channel and Stream Conversion Data

1. Write 1 configures the CMREFCTL register to VCM_REF

= 1.3 V (no electrodes contribute to VCM). RLD is enabled

to RLD_OUT, and the shield amplifier enabled.

2. Write 2 addresses the TESTTONE register to enable the

150 Hz sine wave onto all electrode channels.

3. Write 3 addresses the FILTCTL register to change the

internal low-pass filter to 250 Hz to ensure that the 150 Hz

sine wave can pass through.

4. Write 4 configures the FRMCTL register to output nine

words per frame/packet. The frame/packet of words

consists of the header and three ECG words, pace,

respiration magnitude, and lead-off. The frame is

configured to always send, irrespective of ready status.

The device is in electrode format mode with a data rate

of 2 kHz. Electrode format is required to see the test tone

signal correctly on each electrode channel.

5. Write 5 addresses the ECGCTL register, enabling all

channels into a gain of 1.4, low noise mode. It configures

the device as a master and driven from the XTAL input

source. The device is also put into conversion mode

in this write.

6. Write 6 issues the read command to start putting the

converted data out on the SDO pin.

7. Continue to issue SCLK cycles to read the converted data

at the configured packet data rate.

99B

Example 5: Enable Pace Detection and Stream

Conversion Data (Applies to ADAS1000-4 Only)

1. Write 1 configures the PACECTL register with all three

pace detection instances enabled, PACE1EN detecting on

Lead II, PACE2EN detecting on Lead I, and PACE3EN

detecting on Lead aVF. The pace width filter and validation

filters are also enabled.

2. Write 2 issues the read command to start putting the

converted data out on the SDO pin.

3. Continue to issue SCLK cycles to read the converted data

at the configured packet data rate. When a valid pace is

detected, the detection flags are confirmed in the header

word and the PACEDATA register contains information

on the width and height of the measured pulse from each

measured lead.

4. Note that the PACEAMPTH register default setting is

0x242424, setting the amplitude of each of the pace

instances to 1.98 mV/gain.

5. Note that this example assumes that the FRMCTL register

has already been configured such that the PACEDATA

word is available in the data frame, as arranged in Write 2

of Example 1.

Table 58. Example 4: Configure 150 Hz Test Tone Sine Wave on Each ECG Channel and Stream Conversion Data

Write Command

Read/Write Bit

Data

32-Bit Write Command

Write 1

CMREFCTL

000 0101

0000 0000 0000 0000 0000 1011

0x8500000B

Write 2

TESTTONE

000 1000

1110 0000 0000 0000 0000 1101

0x88E0000D

Write 3

FILTCTL

000 1011

0000 0000 0000 0000 0000 1000

0x8B000008

Write 4

FRMCTL

000 1010

0001 1111 1001 0110 0001 0000

0x8A1F9610

Write 5

ECGCTL

000 0001

1110 0000 0000 0000 1010 1110

0x81E000AE

Write 6

FRAMES

100 0000

0000 0000 0000 0000 0000 0000

0x40000000

Table 59. Example 5: Enable Pace Detection and Stream Conversion Data (Applies to ADAS1000-4 Only)

Write Command

Read/Write Bit

Data

32-Bit Write Command

Write 1

PACECTL

000 0100

0000 0000 0000 1111 1000 1111

0x84000F8F

Write 2

FRAMES

100 0000

0000 0000 0000 0000 0000 0000

0x40000000

Rev. B | Page 75 of 80

ADAS1000-4BSTZ 数据表(PDF) 75 Page - Analog Devices

ADAS1000-4BSTZ 数据表(HTML) 75 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

数据表下载