ADAS1000-4BSTZ datasheet(8/80 Pages) AD

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ADAS1000-3/ADAS1000-4

Data Sheet

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

CLOCK_IO

External clock source supplied to CLK_IO; this pin

is configured as an input when the device is

programmed as a slave

Operating Frequency2

8.192

MHz

Input Duty Cycle2

Output Duty Cycle2

DIGITAL INPUTS

Applies to all digital inputs

Input Low Voltage, VIL

0.3 × IOVDD

Input High Voltage, VIH

0.7 × IOVDD

Input Current, IIH, IIL

−1

μA

−20

+20

μA

has an internal pull-up resistor

RESET

Pin Capacitance2

DIGITAL OUTPUTS

Output Low Voltage, VOL

0.4

ISINK = 1 mA

Output High Voltage, VOH

IOVDD − 0.4

ISOURCE = −1 mA

Output Rise/Fall Time

Capacitive load = 15 pF, 20% to 80%

DVDD REGULATOR

Internal 1.8 V regulator for DVDD

Output Voltage

1.75

1.8

1.85

Available Current1

Droop < 10 mV; for external device loading purposes

Short-Circuit Current Limit

ADCVDD REGULATOR

Internal 1.8 V regulator for ADCVDD; not

recommended as a supply for other circuitry

Output Voltage

1.75

1.8

1.85

Short-Circuit Current Limit

POWER SUPPLY RANGES2

AVDD

3.15

3.3

5.5

IOVDD

1.65

3.6

ADCVDD

1.71

1.8

1.89

If applied by external 1.8 V regulator

DVDD

1.71

1.8

1.89

If applied by external 1.8 V regulator

POWER SUPPLY CURRENTS

AVDD Standby Current

785

975

μA

IOVDD Standby Current

μA

EXTERNALLY SUPPLIED ADCVDD

AND DVDD

All three channels enabled, RLD enabled, pace enabled

AVDD Current

2.4

4.1

High performance mode

2.2

4.1

Low performance mode

3.2

High performance mode, respiration enabled

ADCVDD Current

4.5

6.5

High performance mode

3.3

5.5

Low performance mode

5.4

High performance mode, respiration enabled

DVDD Current

2.0

High performance mode

1.1

Low performance mode

2.0

High performance mode, respiration enabled

INTERNALLY SUPPLIED ADCVDD

AND DVDD

All three channels enabled, RLD enabled, pace enabled

AVDD Current

12.6

High performance mode

6.6

9.6

Low performance mode

14.6

High performance mode, respiration enabled

POWER DISSIPATION

All 3 channels enabled, RLD enabled, pace enabled

Externally Supplied ADCVDD

and DVDD3

Three Input Channels and RLD

19.6

High performance (low noise)

15.2

Low power mode

Internally Supplied ADCVDD

and DVDD

All three channels enabled, RLD enabled, pace enabled

Three Input Channels and RLD

29.7

High performance (low noise)

21.8

Low power mode

Rev. B | Page 8 of 80

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