数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADAS1000-4BSTZ 数据表(PDF) 48 Page - Analog Devices

部件名 ADAS1000-4BSTZ
功能描述  Low Power, Three Electrode Electrocardiogram (ECG) Analog Front End
PDF  80 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADAS1000-4BSTZ 数据表(HTML) 48 Page - Analog Devices

Back Button ADAS1000-4BSTZ Datasheet HTML 44Page - Analog Devices ADAS1000-4BSTZ Datasheet HTML 45Page - Analog Devices ADAS1000-4BSTZ Datasheet HTML 46Page - Analog Devices ADAS1000-4BSTZ Datasheet HTML 47Page - Analog Devices ADAS1000-4BSTZ Datasheet HTML 48Page - Analog Devices ADAS1000-4BSTZ Datasheet HTML 49Page - Analog Devices ADAS1000-4BSTZ Datasheet HTML 50Page - Analog Devices ADAS1000-4BSTZ Datasheet HTML 51Page - Analog Devices ADAS1000-4BSTZ Datasheet HTML 52Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 48 / 80 page
background image
ADAS1000-3/ADAS1000-4
Data Sheet
Common Mode
The ADAS1000-3/ADAS1000-4 have a dedicated CM_OUT
pin serving as an output and a CM_IN pin as an input. In
gang mode, the master device determines the common-mode
voltage based on the selected input electrodes. This common-
mode signal (on CM_OUT) can then be used by subsequent
slave devices (applied to CM_IN) as the common-mode
reference. All electrodes within the slave device are then
measured with respect to the CM_IN signal from the master
device. See the CMREFCTL register in Table 32 for more
details on the control via the serial interface. Figure 74 shows
the connections between a master and slave device using
multiple devices.
Right Leg Drive
The right leg drive comes from the master device. If the
internal RLD resistors of the slave device are to contribute
to the RLD loop, tie the RLD_SJ pins of master and slave
together.
Sequencing Devices into Gang Mode
When entering gang mode with multiple devices, both
devices can be configured for operation, but the conver-
sion enable bit (ECGCTL register, Bit 2, Table 28) of the
master device should be set after the conversion enable bit
of the slave device. When the master device conversion
signal is set, the master device generates one edge on its
SYNC_GANG pin. This applies to any slave SYNC_GANG
inputs, allowing the devices to synchronize ADC conversions.
Rev. B | Page 48 of 80



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com