ADAS1000-4BSTZ datasheet(41/80 Pages) AD

41 / 80 page

Data Sheet

ADAS1000-3/ADAS1000-4

EVALUATING RESPIRATION PERFORMANCE

ECG simulators offer a convenient means of studying the

ADAS1000-3/ADAS1000-4’s performance. While many

simulators offer a variable-resistance respiration capability,

care must be taken when using this feature.

Some simulators use electrically-programmable resistors, often

referred to as digiPOTs, to create the time-varying resistance

to be measured by the respiration function. The capacitances

at the digitPOT's terminals are often unequal and code-

dependent, and these unbalanced capacitances can give rise

to unexpectedly large or small results on different leads for

the same programmed resistance variation. Best results are

obtained with a purpose-built fixture that carefully balances

the capacitance presented to each ECG electrode.

PACING ARTIFACT DETECTION FUNCTION

(ADAS1000-4 ONLY)

The pacing artifact validation function qualifies potential

pacing artifacts and measures the width and amplitude of valid

pulses. These parameters are stored in and available from any of

the pace data registers (Address 0x1A, Address 0x3A to Address

0x3C). This function runs in parallel with the ECG channels.

Digital detection is performed using a state machine operating

on the 128 kHz 16-bit data from the ECG decimation chain.

The main ECG signals are further decimated before appearing

in the 2 kHz output stream so that detected pace signals are not

perfectly time-aligned with fully-filtered ECG data. This time

difference is deterministic and may be compensated for.

The pacing artifact validation function can detect and

measure pacing artifacts with widths from 100 μs to 2 ms

and with amplitudes of <400 μV to >1000 mV. Its filters are

designed to reject heartbeat, noise, and minute ventilation

pulses. The flowchart for the pace detection algorithm is

shown in Figure 71.

The ADAS1000-4 pace algorithm can operate with the ac lead-

off and respiration impedance measurement circuitry enabled.

Once a valid pace has been detected in the assigned leads, the

pace-detected flags appear in the header word (see Table 53) at

the start of the packet of ECG words. These bits indicate that a

pace was qualified. Further information on height and width of

pace is available by reading the contents of Address 0x1A (Register

PACEDATA, see Table 44). This word can be included in the

ECG data packet/frame as dictated by the frame control register

(see Table 37). The data available in the PACEDATA register

is limited to seven bits total for width and height information;

therefore, if more resolution is required on the pace height

and width, this is available by issuing read commands of the

PACExDATA registers (Address 0x3A to Address 0x3C) as

shown in Table 52.

The on-chip filtering contributes some delay to the pace signal

(see the Pace Latency section).

Choice of Leads

Three identical and independent state machines are available

and can be configured to run on up to three of four possible

leads (Lead I, Lead II, Lead III, and aVF) for pacing artifact

detection. Any necessary lead calculations are performed

internally and are independent of EGG channel settings for

output data rate, low-pass filter cutoff, and mode (electrode,

analog lead, common electrode). These calculations take into

account the available front-end configurations as detailed in

Table 15.

The pace detection algorithm searches for pulses by analyzing

samples in the 128 kHz ECG data stream. The algorithm

searches for a leading edge, a peak, and a trailing edge as

defined by values in the PACEEDGETH, PACEAMPTH, and

PACELVLTH registers, along with fixed width qualifiers. The

post-reset default register values can be overwritten via the SPI

bus, and different values can be used for each of the three pace

detection state machines.

Some users may not want to use three pace leads for detection.

In this case, Lead II is the vector of choice, because this lead is

likely to display the best pacing artifact. The other two pace

instances can be disabled if not in use.

The first step in pace detection is to search the data stream for

a valid leading edge. Once a candidate edge has been detected,

the algorithm begins searching for a second, opposite-polarity

edge that meets with pulse width criteria and passes the

(optional) noise filters. Only those pulses meeting all the

criteria are flagged as valid pace pulses. Detection of a valid

pace pulse sets the flag(s) in the frame header register and

stores amplitude and width information in the PACEDATA

looks for a negative or positive pulse

Rev. B | Page 41 of 80

ADAS1000-4BSTZ 数据表(PDF) 41 Page - Analog Devices

ADAS1000-4BSTZ 数据表(HTML) 41 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

数据表下载