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ADAS1000-4BSTZ 数据表(PDF) 5 Page - Analog Devices |
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ADAS1000-4BSTZ 数据表(HTML) 5 Page - Analog Devices |
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5 / 80 page ![]() Data Sheet ADAS1000-3/ADAS1000-4 SPECIFICATIONS AVDD = 3.3 V ± 5%, IOVDD = 1.65 V to 3.6 V, AGND = DGND = 0 V, REFIN tied to REFOUT, externally supplied crystal/clock = 8.192 MHz. Decoupling for reference and supplies as noted in the Power Supply, Grounding, and Decoupling Strategy section. TA = −40°C to +85°C, unless otherwise noted. Typical specifications are mean values at TA = 25°C. For specified performance, internal ADCVDD and DVDD linear regulators have been used. They may be supplied from external regulators. ADCVDD = 1.8 V ± 5%, DVDD = 1.8 V ± 5%. Front-end gain settings: GAIN 0 = ×1.4, GAIN 1 = ×2.1, GAIN 2 = ×2.8, GAIN 3 = ×4.2. Table 2. Parameter Min Typ Max Unit Test Conditions/Comments ECG CHANNEL These specifications apply to the following pins: ECG1_LA, ECG2_LL, ECG3_RA, CM_IN (CE mode), EXT_RESP_xx pins when used in extend switch mode Electrode Input Range Independent of supply 0.3 1.3 2.3 V GAIN 0 (gain setting ×1.4) 0.63 1.3 1.97 V GAIN 1 (gain setting ×2.1) 0.8 1.3 1.8 V GAIN 2 (gain setting ×2.8) 0.97 1.3 1.63 V GAIN 3 (gain setting ×4.2) Input Bias Current −40 ±1 +40 nA Relates to each electrode input; over operating range; dc and ac lead-off are disabled −200 +200 nA AGND to AVDD Input Offset −7 mV Electrode/vector mode with VCM = VCM_REF GAIN 3 −7 mV GAIN 2 −15 mV GAIN 1 −22 mV GAIN 0 Input Offset Tempco1 ±2 μV/°C Input Amplifier Input Impedance2 1||10 GΩ||pF At 10 Hz CMRR2 105 110 dB 51 kΩ imbalance, 60 Hz with ±300 mV differential dc offset; per AAMI/IEC standards; with driven leg loop closed Crosstalk1 80 dB Between channels Resolution2 19 Bits Electrode/vector mode, 2 kHz data rate, 24-bit data-word 18 Bits Electrode/vector mode, 16 kHz data rate, 24-bit data- word 16 Bits Electrode/analog lead mode, 128 kHz data rate, 16-bit data-word Integral Nonlinearity Error 30 ppm GAIN 0; all data rates Differential Nonlinearity Error 5 ppm GAIN 0 Gain2 Referred to input; (2 × VREF)/gain/(2N − 1); Applies after factory calibration. User calibration adjusts this number. GAIN 0 (×1.4) 4.9 µV/LSB At 19-bit level in 2 kHz data rate 9.81 μV/LSB At 18-bit level in 16 kHz data rate 39.24 μV/LSB At 16-bit level in 128 kHz data rate GAIN 1 (×2.1) 3.27 μV/LSB At 19-bit level in 2 kHz data rate 6.54 μV/LSB At 18-bit level in 16 kHz data rate 26.15 μV/LSB At 16-bit level in 128 kHz data rate GAIN 2 (×2.8) 2.45 μV/LSB At 19-bit level in 2 kHz data rate 4.9 μV/LSB At 18-bit level in 16 kHz data rate 19.62 μV/LSB At 16-bit level in 128 kHz data rate GAIN 3 (×4.2) 1.63 μV/LSB No factory calibration for this gain setting At 19-bit level in 2 kHz data rate 3.27 μV/LSB At 18-bit level in 16 kHz data rate 13.08 μV/LSB At 16-bit level in 128 kHz data rate Rev. B | Page 5 of 80 |
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