AR8327-AL1A-R datasheet(261/394 Pages) ETC2

261 / 394 page

Atheros Communications, Inc.

AR8327/AR8327N Seven-port Gigabit Ethernet

Switch

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261

3.7.86

ACL_RATE_CTRL0_1

Address 0x0A08

SFT&HW RST

Table 3-237, “ACL Rate Control Register 0,” on page 261 summerizes the ACL_RATE_CTRL0_1 Register

Table 3-237.

ACL Rate Control Register 0

3.7.87

ACL_RATE_CTRL1_1

Address 0x0A0C

SFT&HW RST

19:18

R/W

2'b01

ACL_RATE_TIME_SLOT_0

ACL Ingress rate limit control timer

slot.

2'b00: 100us;

2'b01: 1ms

2'b10: 10ms

2'b11: 100ms

Notes: if port rate limit set to less than

96kbps, don't select 100us as time slot

17:15

R/W

ACL_EBS_0

Excess burst size for ingress rate limit

14:0

R/W

0x7FFF

ACL_EIR_0

Ingress Rate Limit for all priority.

Rate is limited to times of 32kbps.

Default 15'h7FFF is for disable rate

limit for ingress. if these bits are set to

15'h0, no frame should be received in

from this port.

Bit

R/W

Inital

Value

Mnemonic

Description

Bit

R/W

Inital

Value

Mnemonic

Description

31:18

R/O

RESERVED

17:15

R/W

ACL_CBS_1

Commited burst size for ingress rate

limit

14:0

R/W

0x7FFF

ACL_CIR_1

Ingress Rate Limit for all priority.

Rate is limited to times of 32kbps.

Default 15'h7FFF is for disable rate

limit for ingress. if these bits are set to

15'h0, no frame should be received in

from this port.

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