AR8327-AL1A-R datasheet(264/394 Pages) ETC2

264 / 394 page

264 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch

Atheros Communications, Inc.

264 • June 2011

COMPANY CONFIDENTIAL

3.7.90

ACL_RATE_CTRL0_3

Address 0x0A18

SFT&HW RST

Table 3-241, “ACL_3 Rate Control Register 0,” on page 264 summerizes the ACL_RATE_CTRL0_3

Table 3-241.

ACL_3 Rate Control Register 0

3.7.91

ACL_RATE_CTRL1_3

Address 0x0A1C

SFT&HW RST

Table 3-242, “ACL_3 Rate Control Register 1,” on page 265 summerizes the ACL_RATE_CTRL1_3

17:15

R/W

ACL_EBS_2

Excess burst size for ingress rate limit

14:0

R/W

0x7FFF

ACL_EIR_2

Ingress Rate Limit for all priority.

Rate is limited to times of 32kbps.

Default 15'h7FFF is for disable rate

limit for ingress. if these bits are set to

15'h0, no frame should be received in

from this port.

Bit

R/W

Inital

Value

Mnemonic

Description

Bit

R/W

Inital

Value

Mnemonic

Description

31:18

R/O

RESERVED

17:15

R/W

ACL_CBS_3

Commited burst size for ingress rate

limit

14:0

R/W

0x7FFF

ACL_CIR_3

Ingress Rate Limit for all priority.

Rate is limited to times of 32kbps.

Default 15'h7FFF is for disable rate

limit for ingress. if these bits are set to

15'h0, no frame should be received in

from this port.

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