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AR8327-AL1A-R 数据表(PDF) 265 Page - List of Unclassifed Manufacturers |
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AR8327-AL1A-R 数据表(HTML) 265 Page - List of Unclassifed Manufacturers |
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265 / 394 page ![]() Atheros Communications, Inc. AR8327/AR8327N Seven-port Gigabit Ethernet Switch • 265 Table 3-242. ACL_3 Rate Control Register 1 3.7.92 ACL_RATE_CTRL0_4 Address 0x0A20 SFT&HW RST Table 3-243, “ACL_4 Rate Control Register 0,” on page 266 summerizes the ACL_RATE_CTRL0_4 Register 0 Bit R/W Inital Value Mnemonic Description 31:24 R/O 0 RESERVED 23 R/W 0 ACL_BORROW_EN_3 Borrow enable 22 R/W 0 ACL_RATE_UNIT_3 1: Packets/ 0: bytes 21 R/W 0 ACL_CF_3 Coupling flag for ingress rate limit 20 R/W 0 ACL_CM_3 Color mode for ingress rate limit 19:18 R/W 2'b01 ACL_RATE_TIME_SLOT_3 ACL Ingress rate limit control timer slot. 2'b00: 100us; 2'b01: 1ms 2'b10: 10ms 2'b11: 100ms Notes: if port rate limit set to less than 96kbps, don't select 100us as time slot 17:15 R/W 0 ACL_EBS_3 Excess burst size for ingress rate limit 14:0 R/W 0x7FFF ACL_EIR_3 Ingress Rate Limit for all priority. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for ingress. if these bits are set to 15'h0, no frame should be received in from this port. |
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