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MPFS250T 数据表(PDF) 114 Page - Microchip Technology |
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MPFS250T 数据表(HTML) 114 Page - Microchip Technology |
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114 / 128 page ![]() Condition Unit Max Typ Min Parameter %; VDD25= 2.5 V ±5 % Temp= –40 ºC to 1 00 ºC; VDD = 1.0 ±3 V 2.21 2.31 VDD25_LOW_DET %; VDD18= 1.8 V ±5 % 6.10 Power-Up to Functional Timing Microsemi non-volatile FPGA technology offers the fastest boot-time of any mid-range FPGA in the market. The following tables describes both cold-boot (from power-on) and warm-boot (assertion of DEVRST_N pin or assertion of reset from the tamper macro) timing. The power-up diagrams assume all power supplies to the device are stable. 6.10.1 Power-On (Cold) Reset Initialization Sequence The following cold reset timing diagram shows the initialization sequencing of the device. Figure 8 • Cold Reset Timing Notes: • The previous diagram shows the case where VDDI/VDDAUX of I/O banks are powered either before or sufficiently soon after VDD/VDD18/VDD25 that the I/O bank enable time is measured from the assertion time of VDD/VDD18/VDD25 (that is, the PUFT specification). If VDDI/VDDAUX of I/O banks are powered sufficiently after VDD/VDD18/VDD25, then the I/O bank enable time is measured from the assertion of VDDI/VDDAUX and is not specified by the PUFT specification. In this case, I/O operation is indicated by the assertion of BANK_i_VDDI_STATUS, rather than being measured relative to FABRIC_POR_N negation. • AUTOCALIB_DONE assertion indicates the completion of calibration for any I/O banks specified by the user for auto-calibration. AUTOCALIB_DONE asserts independently of DEVICE_INIT_DONE. It may assert before or after DEVICE_INIT_DONE and is determined by the following: ◦ How long after VDD/VDD18/VDD25 that VDDI/VDDAUX are powered on. Note that if any of the user-specified I/O banks are not powered on within the auto-calibration timeout window, then AUTOCALIB_DONE doesn't assert until after this timeout. ◦ The specified ramp times of VDDI of each I/O bank designated for auto-calibration. ◦ How much auto-initialization is to be performed for the PCIe, SERDES transceivers, and fabric LSRAMs. 110 Microsemi Proprietary and Confidential. DS0147 Revision 1.0 AC Switching Characteristics |
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