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XIO2000 数据表(PDF) 57 Page - Texas Instruments

部件名 XIO2000
功能描述  XIO2000 PCI Express to PCI Bus Translation Bridge
PDF  150 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

XIO2000 数据表(HTML) 57 Page - Texas Instruments

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Classic PCI Configuration Space
45
November 2005
SCPS097B
4.9
BIST Register
Since the bridge does not support a built-in self test (BIST), this read-only register returns the value of 00h
when read.
PCI register offset:
0Fh
Register type:
Read-only
Default value:
00h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
0
4.10 Device Control Base Address Register
This read/write register programs the memory base address that accesses the device control registers. See
Table 4−5 for a complete description of the register contents.
PCI register offset:
10h
Register type:
Read-only, Read/Write
Default value:
0000 0000h
BIT NUMBER
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RESET STATE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT NUMBER
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 4−5. Device Control Base Address Register Description
BIT
FIELD NAME
ACCESS
DESCRIPTION
31:12
ADDRESS
RW
Memory base address. The memory address field for the bridge uses 20 read/write bits indicating
that 4096 bytes is the amount of memory space that is reserved.
11:4
RSVD
R
Reserved. These bits are read-only and return 00h when read.
3
PRE_FETCH
R
Prefetchable. This bit is read-only 0b indicating that this memory window is not prefetchable.
2:1
MEM_TYPE
R
Memory type. This field is read-only 00b indicating that this window can be located anywhere in the
32-bit address space.
0
MEM_IND
R
Memory space indicator. This field returns 0b indicating that memory space is used.
4.11 Primary Bus Number Register
This read/write register specifies the bus number of the PCI bus segment that the PCI Express interface is
connected to.
PCI register offset:
18h
Register type:
Read/Write
Default value:
00h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
0



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