XIO2000 datasheet(13/150 Pages) TI

13 / 150 page

Features

November 2005

SCPS097B

XIO2000 Features

D Full x1 PCI Express Throughput

D Fully Compliant with PCI Express to

PCI/PCI-X Bridge Specification,

Revision 1.0

D Fully Compliant with PCI Express Base

Specification, Revision 1.0a

D Fully Compliant with PCI Local Bus

Specification, Revision 2.3

D Extended Virtual Channel (VC) Support

Includes a Second VC for

Quality-of-Service and Isochronous

Applications

D PCI Express Advanced Error Reporting

Capability Including ECRC Support

D Support for D1, D2, D3hot, and D3cold

D Active State Link Power Management

Saves Power When Packet Activity on the

PCI Express Link is Idle, Using Both L0s

and L1 States

D Wake Event and Beacon Support

D Error Forwarding Including PCI Express

Data Poisoning and PCI Bus Parity Errors

D Utilizes 100-MHz Differential PCI Express

Common Reference Clock or 125-MHz

Single-Ended, Reference Clock

D Robust Pipeline Architecture To Minimize

Transaction Latency

D Full PCI Local Bus 66-MHz/32-Bit

Throughput

D Support for Six Subordinate PCI Bus

Masters with Internal Configurable, 2-Level

Prioritization Scheme

D Advanced VC Arbitration Options Include

VC1 Strict Priority, Hardware-Fixed

Round-Robin, and 32-Phase, Weighted

Round-Robin

D Advanced PCI Bus Port Arbitration Options

Include 128-phase, Weighted Round-Robin

Time-Based and 128-phase, Weighted

Round-Robin Aggressive Time-Based

D Advanced PCI Isochronous Windows for

Memory Space Mapping to a Specified

Traffic Class

D Advanced PCI Express Message Signaled

Interrupt Generation for Serial IRQ

Interrupts from CardBus Applications

D External PCI Bus Arbiter Option

D PCI Bus LOCK Support

D Clock Run and Power Override Support

D Six Buffered PCI Clock Outputs (33 MHz or

66 MHz)

D PCI Bus Interface 3.3-V and 5.0-V (33 MHz

only at 5.0 V) Tolerance Options

D Integrated AUX Power Switch Drains VAUX

Power Only When Main Power Is Off

D Eight 3.3-V, Multifunction, General-Purpose

I/O Terminals

D Memory-Mapped EEPROM Serial-Bus

Controller Supporting PCI Express Power

Budget/Limit Extensions for Add-In Cards

D Compact Footprint, 201-Ball, GZZ

MicroStarTM BGA or Lead-Free 201-Ball,

ZZZ MicroStarTM BGA

Table 1−1.

Figure 1−1.

MicroStar BGA is a trademark of Texas Instruments.

Other trademarks are the property of their respective owners.

XIO2000 数据表(PDF) 13 Page - Texas Instruments

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