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XIO2000 数据表(PDF) 24 Page - Texas Instruments |
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XIO2000 数据表(HTML) 24 Page - Texas Instruments |
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24 / 150 page ![]() Introduction 12 November 2005 SCPS097B Table 2−8. PCI System Terminals (Continued) SIGNAL BALL I/O TYPE CELL TYPE CLAMP RAIL EXTERNAL PARTS DESCRIPTION PAR E02 I/O PCI Bus VCCP − PCI bus parity PERR F03 I/O PCI Bus VCCP Pullup resistor per PCI spec PCI parity error PME M15 I LV CMOS VDD_33_ COMBIO Pullup resistor per PCI spec PCI power management event. This terminal may be used to detect PME events from a PCI device on the secondary bus. Note: The PME input buffer has hysteresis. REQ5 REQ4 REQ3 REQ2 REQ1 REQ0 B13 B12 B11 C10 C09 B08 I PCI Bus VCCP If unused, a weak pullup resistor per PCI spec PCI request inputs. These signals are used for arbitration on the secondary PCI bus when an external arbiter is not used. REQ0 is used as the GNT for the bridge when an external arbiter is used. PRST U03 O PCI Bus VCCP − PCI reset. This terminal is an output to the secondary PCI bus. SERR E01 I/O PCI Bus VCCP Pullup resistor per PCI spec PCI system error STOP F02 I/O PCI Bus VCCP Pullup resistor per PCI spec PCI stop TRDY G03 I/O PCI Bus VCCP Pullup resistor per PCI spec PCI target ready Table 2−9. Reserved Terminals SIGNAL BALL I/O TYPE DESCRIPTION RSVD N15, N16, P16, R08, T08, T10, T11, T12, T14, T15, T17, U09, U11, U12, U13, U14, U15, U16 O Reserved, do not connect to external signals. RSVD R16 I Must be connected to VDD_33. RSVD D16, D17, P17, R09, T09, U10 I Must be connected to VSS. |
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