XIO2000 datasheet(26/150 Pages) TI

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Introduction

November 2005

SCPS097B

Table 2−10. Miscellaneous Terminals (Continued)

SIGNAL

BALL

I/O

TYPE

CELL

TYPE

CLAMP

RAIL

EXTERNAL

PARTS

DESCRIPTION

GRST

N17

CMOS

VDD_33_

COMBIO

−

Global reset input. Asynchronously resets all logic in device,

including sticky bits and power management state machines.

Note: The GRST input buffer has both hysteresis and an internal

active pullup.

LOCK

U04

I/O

PCI

Bus

VCCP

Pullup

resistor per

PCI spec

This terminal functions as PCI LOCK when bit 12 (LOCK_EN) is

set in the general control register (see Section 4.65).

Note: In lock mode, an external pullup resistor is required to

prevent the LOCK signal from floating.

M66EN

R01

PCI

Bus

VCCP

Pullup

resistor per

PCI spec

66-MHz mode enable

0 = Secondary PCI bus and clock outputs operate at 33 MHz

1 = Secondary PCI bus and clock outputs operate at 66 MHz

Note: If the PCI bus clock is always 33 MHz, then this terminal is

connected to VSS.

SERIRQ

T04

I/O

PCI

Bus

VCCP

Pullup or

pulldown

resistor

Serial IRQ interface. This terminal functions as a serial IRQ

interface if a pullup is detected when PERST is deasserted. If a

pulldown is detected, then the serial IRQ interface is disabled.

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