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数据搜索系统，热门电子元器件搜索 |
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XIO2000 数据表(PDF) 23 Page - Texas Instruments |
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XIO2000 数据表(HTML) 23 Page - Texas Instruments |
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23 / 150 page  Introduction 11 November 2005 SCPS097B Table 2−8. PCI System Terminals SIGNAL BALL I/O TYPE CELL TYPE CLAMP RAIL EXTERNAL PARTS DESCRIPTION AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 P02 P01 N02 N01 M02 M01 L04 L03 L01 K03 K02 K01 J02 J03 H02 H03 D02 C01 C02 B01 A02 B03 A03 C04 B05 A05 B06 A06 D07 C07 B07 A07 I/O PCI Bus VCCP − PCI address data lines C/BE[3] C/BE[2] C/BE[1] C/BE[0] L02 H01 D01 B04 I/O PCI Bus VCCP − PCI command byte enables DEVSEL F01 I/O PCI Bus VCCP Pullup resistor per PCI spec PCI device select FRAME G01 I/O PCI Bus VCCP Pullup resistor per PCI spec PCI frame GNT5 GNT4 GNT3 GNT2 GNT1 GNT0 A14 C12 C11 A10 A09 A08 O PCI Bus VCCP − PCI grant outputs. These signals are used for arbitration when the PCI bus is the secondary bus and an external arbiter is not used. GNT0 is used as the REQ for the bridge when an external arbiter is used. INTA INTB INTC INTD R02 T01 U02 T03 I PCI Bus VCCP Pullup resistor per PCI spec PCI interrupts A−D. These signals are interrupt inputs to the bridge on the secondary PCI bus. IRDY G02 I/O PCI Bus VCCP Pullup resistor per PCI spec PCI initiator ready |
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