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XIO2000 数据表(PDF) 20 Page - Texas Instruments |
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XIO2000 数据表(HTML) 20 Page - Texas Instruments |
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20 / 150 page  Introduction 8 November 2005 SCPS097B Table 2−2. XIO2000 Signal Names Sorted Alphabetically (Continued) SIGNAL NAME BGA BALL # SIGNAL NAME BGA BALL # SIGNAL NAME BGA BALL # VDD_33 M03 VSS G08 VSS L08 VDD_33 P09 VSS G09 VSS L09 VDD_33 P10 VSS G10 VSS L10 VDD_33 P11 VSS G11 VSS L11 VDD_33 R05 VSS G17 VSS N03 VDD_33 R14 VSS H07 VSS P08 VDD_33 T13 VSS H08 VSS R04 VDD_33_AUX K14 VSS H09 VSS R06 VDD_33_COMB K16 VSS H10 VSS R10 VDD_33_COMBIO L14 VSS H11 VSS R11 VDDA_15 F17 VSS J07 VSS R12 VDDA_15 G15 VSS J08 VSS R13 VDDA_15 J14 VSS J09 VSS R17 VDDA_15 J15 VSS J10 VSSA B17 VDDA_33 D15 VSS J11 VSSA E15 VDDA_33 K15 VSS K04 VSSA F15 VSS C05 VSS K07 VSSA F16 VSS C14 VSS K08 VSSA G14 VSS D03 VSS K09 VSSA G16 VSS D08 VSS K10 VSSA H15 VSS D11 VSS K11 VSSA J16 VSS G04 VSS K17 VSSA L15 VSS G07 VSS L07 WAKE M16 2.8 Terminal Descriptions Table 2−3 through Table 2−10 give a description of the terminals. These terminals are grouped in tables by functionality. Each table includes the terminal name, terminal number, I/O type, and terminal description. The following list describes the different input/output cell types that appear in the terminal description tables: • HS DIFF IN = High speed differential input. • HS DIFF OUT = High speed differential output. • PCI BUS = PCI bus 3-state bidirectional buffer with 3.3-V or 5.0-V clamp rail. • LV CMOS = 3.3-V low voltage CMOS input or output with 3.3-V clamp rail. • BIAS = Input/output terminals that generate a bias voltage to determine a driver’s operating current. • Feed through = these terminals connect directly to macros within the part and not through an input or output cell. • PWR = Power terminal • GND = Ground terminal |
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