CS5535 datasheet(312/555 Pages) NSC

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312

Revision 0.8

DIVIL Register Descriptions (Continued)

5.6.2.8

Local BAR - Power Management Support (DIVIL_LBAR_PMS)

See Section 4.6.1 "LBARs and Comparators" on page 97 for operational details. The Power Management Support registers

take 128 bytes of I/O space.

DIVIL_LBAR_ACPI Register Map

63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32

RSVD

IO_MASK

RSVD

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

87654321

RSVD

BASE_ADDR

RSVD

DIVIL_LBAR_ACPI Bit Descriptions

Bit

Name

Description

63:49

RSVD

Reserved. Reads return 0; writes have no effect.

RSVD

Reserved. Always write 0.

47:44

IO_MASK

I/O Address Mask Value. See discussion in Section 4.6.1 "LBARs and Comparators"

on page 97

43:33

RSVD

Reserved. Reads return 0; writes have no effect.

LBAR_EN

LBAR Enable.

0: Disable LBAR.

1: Enable LBAR.

31:17

RSVD

Reserved. Reads return 0; writes have no effect.

RSVD

Reserved. Always write 0.

15:5

BASE_ADDR

Base Address in I/O Space. See discussion in Section 4.6.1 "LBARs and Compara-

tors" on page 97

4:0

RSVD

Reserved. Reads return 0; writes have no effect.

MSR Address

5140000Fh

Type

R/W

Reset Value

00000000_00000000h

DIVIL_LBAR_PMS Register Map

63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32

RSVD

IO_MASK

RSVD

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

87654321

RSVD

BASE_ADDR

RSVD

DIVIL_LBAR_PMS Bit Descriptions

Bit

Name

Description

63:49

RSVD

Reserved. Reads return 0; writes have no effect.

RSVD

Reserved. Always write 0.

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